Contiki 2.5
usb-arch.c
1 #include <usb-arch.h>
2 #include <gpio.h>
3 #include <nvic.h>
4 #include <stdio.h>
5 #include <debug-uart.h>
6 #include <usb-stm32f103.h>
7 
8 /* #define DEBUG */
9 #ifdef DEBUG
10 #define PRINTF(...) printf(__VA_ARGS__)
11 #else
12 #define PRINTF(...)
13 #endif
14 typedef struct
15 {
16  vu32 EPR[8];
17  u32 RESERVED[8];
18  vu32 CNTR;
19  vu32 ISTR;
20  vu32 FNR;
21  vu32 DADDR;
22  vu32 BTABLE;
23 } USB_TypeDef;
24 
25 #define USB_BASE (APB1PERIPH_BASE + 0x5c00)
26 #define USB_MEM_BASE (APB1PERIPH_BASE + 0x6000)
27 #define USB_MEM_SIZE (512)
28 #define USB ((volatile USB_TypeDef *) USB_BASE)
29 
30 typedef struct {
31  vu32 ADDR_TX;
32  vu32 COUNT_TX;
33  vu32 ADDR_RX;
34  vu32 COUNT_RX;
35 } USB_HW_Buffer;
36 
37 #define USB_EP0_BUF_SIZE (2*CTRL_EP_SIZE)
38 
39 #define USB_EP1_BUF_SIZE (2*USB_EP1_SIZE)
40 
41 #define USB_EP2_BUF_SIZE (2*USB_EP2_SIZE)
42 
43 #define USB_EP3_BUF_SIZE (2*USB_EP3_SIZE)
44 
45 #define USB_EP4_BUF_SIZE (2*USB_EP4_SIZE)
46 
47 #define USB_EP5_BUF_SIZE (2*USB_EP5_SIZE)
48 
49 #define USB_EP6_BUF_SIZE (2*USB_EP6_SIZE)
50 
51 #define USB_EP7_BUF_SIZE (2*USB_EP7_SIZE)
52 
53 
54 
55 #ifndef MAX_CTRL_DATA
56 #define MAX_CTRL_DATA 128
57 #endif
58 /* Double buffered IN endpoint */
59 #define ADDR_TX_0 ADDR_TX
60 #define ADDR_TX_1 ADDR_RX
61 #define COUNT_TX_0 COUNT_TX
62 #define COUNT_TX_1 COUNT_RX
63 
64 /* Double buffered OUT endpoint */
65 #define ADDR_RX_0 ADDR_TX
66 #define ADDR_RX_1 ADDR_RX
67 #define COUNT_RX_0 COUNT_TX
68 #define COUNT_RX_1 COUNT_RX
69 
70 #define USB_EPxR_EP_TYPE_BULK 0
71 #define USB_EPxR_EP_TYPE_CONTROL USB_EP0R_EP_TYPE_0
72 #define USB_EPxR_EP_TYPE_ISO USB_EP0R_EP_TYPE_1
73 #define USB_EPxR_EP_TYPE_INTERRUPT (USB_EP0R_EP_TYPE_1|USB_EP0R_EP_TYPE_0)
74 
75 #define USB_EPxR_EP_DBL_BUF USB_EP0R_EP_KIND
76 #define USB_EPxR_EP_STATUS_OUT USB_EP0R_EP_KIND
77 
78 #define USB_EPxR_STAT_RX_DISABLED 0
79 #define USB_EPxR_STAT_RX_STALL USB_EP0R_STAT_RX_0
80 #define USB_EPxR_STAT_RX_NAK USB_EP0R_STAT_RX_1
81 #define USB_EPxR_STAT_RX_VALID (USB_EP0R_STAT_RX_1|USB_EP0R_STAT_RX_0)
82 
83 #define USB_EPxR_STAT_TX_DISABLED 0
84 #define USB_EPxR_STAT_TX_STALL USB_EP0R_STAT_TX_0
85 #define USB_EPxR_STAT_TX_NAK USB_EP0R_STAT_TX_1
86 #define USB_EPxR_STAT_TX_VALID (USB_EP0R_STAT_TX_1|USB_EP0R_STAT_TX_0)
87 
88 #define USB_EPxR_SW_BUF_TX USB_EP0R_DTOG_RX
89 #define USB_EPxR_SW_BUF_RX USB_EP0R_DTOG_TX
90 
91 static const uint16_t ep_buffer_size[8] =
92  {
93  USB_EP0_BUF_SIZE,
94  USB_EP1_BUF_SIZE,
95  USB_EP2_BUF_SIZE,
96  USB_EP3_BUF_SIZE,
97  USB_EP4_BUF_SIZE,
98  USB_EP5_BUF_SIZE,
99  USB_EP6_BUF_SIZE,
100  USB_EP7_BUF_SIZE
101  };
102 
103 #define USB_EP_BUF_SIZE(ep) ep_buffer_size[ep]
104 #define USB_EP_BUF_OFFSET(ep) ep_buffer_offset[ep]
105 #define USB_EP_BUF_ADDR(ep) (u32*)(USB_MEM_BASE + ep_buffer_offset[ep]*2);
106 #define USB_EP_BUF_DESC(ep) ((USB_HW_Buffer*)(USB_MEM_BASE + 16 * (ep)))
107 
108 #define USB_EP0_OFFSET (8*USB_MAX_ENDPOINTS)
109 #define USB_EP1_OFFSET (USB_EP0_OFFSET + USB_EP0_BUF_SIZE)
110 #define USB_EP2_OFFSET (USB_EP1_OFFSET + USB_EP1_BUF_SIZE)
111 #define USB_EP3_OFFSET (USB_EP2_OFFSET + USB_EP2_BUF_SIZE)
112 #define USB_EP4_OFFSET (USB_EP3_OFFSET + USB_EP3_BUF_SIZE)
113 #define USB_EP5_OFFSET (USB_EP4_OFFSET + USB_EP4_BUF_SIZE)
114 #define USB_EP6_OFFSET (USB_EP5_OFFSET + USB_EP5_BUF_SIZE)
115 #define USB_EP7_OFFSET (USB_EP6_OFFSET + USB_EP6_BUF_SIZE)
116 
117 #if (USB_EP7_OFFSET+USB_EP7_BUF_SIZE) > USB_MEM_SIZE
118 #error USB endpoints buffers does not fit in USB memory
119 #endif
120 static const uint16_t ep_buffer_offset[8] =
121  {
122  USB_EP0_OFFSET,
123  USB_EP1_OFFSET,
124  USB_EP2_OFFSET,
125  USB_EP3_OFFSET,
126  USB_EP4_OFFSET,
127  USB_EP5_OFFSET,
128  USB_EP6_OFFSET,
129  USB_EP7_OFFSET
130  };
131 
132 #define USB_EP_BUF_CAPACITY(s) ((((s) <64)?((s)/2):(0x20 | ((s)/64)))<<10)
133 
134 typedef struct _USBEndpoint USBEndpoint;
135 struct _USBEndpoint
136 {
137  uint16_t status;
138  uint8_t addr;
139  uint8_t flags;
140  USBBuffer *buffer; /* NULL if no current buffer */
141  struct process *event_process;
142  uint16_t events;
143  uint16_t xfer_size;
144 };
145 
146 #define USB_EP_FLAGS_TYPE_MASK 0x03
147 #define USB_EP_FLAGS_TYPE_BULK 0x00
148 #define USB_EP_FLAGS_TYPE_CONTROL 0x01
149 #define USB_EP_FLAGS_TYPE_ISO 0x02
150 #define USB_EP_FLAGS_TYPE_INTERRUPT 0x03
151 
152 #define IS_EP_TYPE(ep, type) (((ep)->flags & USB_EP_FLAGS_TYPE_MASK) == (type))
153 #define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL)
154 #define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK)
155 #define IS_INTERRUPT_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_INTERRUPT)
156 
157 #define USB_EP_FLAGS_ENABLED 0x04
158 
159 /* A packet has been received but the data is still in hardware buffer */
160 #define USB_EP_FLAGS_RECV_PENDING 0x08
161 /* The pending packet is a SETUP packet */
162 #define USB_EP_FLAGS_SETUP_PENDING 0x10
163 
164 /* The data in the hardware buffer is being transmitted */
165 #define USB_EP_FLAGS_TRANSMITTING 0x20
166 
167 /* The receiver is waiting for a packet */
168 #define USB_EP_FLAGS_RECEIVING 0x40
169 
170 /* For bulk endpoints. Both buffers are busy are in use, either by
171  hardware or software. */
172 #define USB_EP_FLAGS_DOUBLE 0x80
173 
174 /* States for double buffered reception:
175 
176 Packets being received 0 1 2 1 0 0
177 Packets pending 0 0 0 1 2 1
178 
179 RECVING 0 1 1 1 0 0
180 RECV_PENDING 0 0 0 1 1 1
181 DOUBLE 0 0 1 0 1 0
182 */
183 
184 /* States for double buffered transmission:
185 
186 Packets being transmitted 0 1 2
187 
188 TRANSMITTING 0 1 1
189 DOUBLE 0 0 1
190 */
191 
192 /* Index in endpoint array */
193 #define EP_INDEX(addr) ((addr) & 0x7f)
194 
195 /* Get address of endpoint struct */
196 #define EP_STRUCT(addr) (&usb_endpoints[EP_INDEX(addr)])
197 
198 /* Number of hardware endpoint */
199 #define EP_HW_NUM(addr) ((addr) & 0x7f)
200 
201 #define USB_DISABLE_INT \
202  NVIC_DISABLE_INT(USB_LP_CAN_RX0_IRQChannel);\
203  NVIC_DISABLE_INT(USB_HP_CAN_TX_IRQChannel)
204 
205 #define USB_ENABLE_INT \
206  NVIC_ENABLE_INT(USB_LP_CAN_RX0_IRQChannel);\
207  NVIC_ENABLE_INT(USB_HP_CAN_TX_IRQChannel)
208 
209 static inline uint32_t
210 usb_save_disable_int()
211 {
212  uint32_t v = NVIC->ISER[0];
213  NVIC->ICER[0] = (1<<USB_HP_CAN_TX_IRQChannel | 1<<USB_LP_CAN_RX0_IRQChannel);
214  return v;
215 }
216 
217 static inline void
218 usb_restore_int(uint32_t v)
219 {
220  NVIC->ISER[0] =
221  v & (1<<USB_HP_CAN_TX_IRQChannel | 1<<USB_LP_CAN_RX0_IRQChannel);
222 }
223 
224 static USBEndpoint usb_endpoints[USB_MAX_ENDPOINTS];
225 struct process *event_process = 0;
226 volatile unsigned int events = 0;
227 
228 static void
229 notify_process(unsigned int e)
230 {
231  events |= e;
232  if (event_process) {
233  process_poll(event_process);
234  }
235 }
236 
237 static void
238 notify_ep_process(USBEndpoint *ep, unsigned int e)
239 {
240  ep->events |= e;
241  if (ep->event_process) {
242  process_poll(ep->event_process);
243  }
244 }
245 
246 
247 static void
248 usb_arch_reset(void)
249 {
250  unsigned int e;
251  for (e = 0; e < USB_MAX_ENDPOINTS; e++) {
252  if (usb_endpoints[e].flags &USB_EP_FLAGS_ENABLED) {
253  USBBuffer *buffer = usb_endpoints[e].buffer;
254  usb_endpoints[e].flags = 0;
255  while(buffer) {
256  buffer->flags &= ~USB_BUFFER_SUBMITTED;
257  buffer = buffer->next;
258  }
259  }
260  }
261  usb_arch_setup_control_endpoint(0);
262  USB->DADDR = 0x80;
263 }
264 
265 void
266 usb_arch_setup(void)
267 {
268  unsigned int i;
269  RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
270  RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN);
271  RCC->APB1ENR |= (RCC_APB1ENR_USBEN);
272  RCC->APB1RSTR &= ~RCC_APB1RSTR_USBRST;
273 
274  GPIO_CONF_OUTPUT_PORT(A,11,ALT_PUSH_PULL,50);
275  GPIO_CONF_OUTPUT_PORT(A,12,ALT_PUSH_PULL,50);
276  GPIO_CONF_OUTPUT_PORT(A,10, PUSH_PULL, 2);
277  GPIOA->BSRR = GPIO_BSRR_BR10;
278 
279  /* Turn on analog part */
280  USB->CNTR &= ~USB_CNTR_PDWN;
281 
282  for (i = 0; i < 24; i++) asm("nop"::); /* Wait at least 1us */
283  /* Release reset */
284  USB->CNTR &= ~USB_CNTR_FRES;
285  /* Clear any interrupts */
286  USB->ISTR = ~(USB_ISTR_PMAOVR |USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP
287  | USB_ISTR_RESET);
288 
289  for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
290  usb_endpoints[i].flags = 0;
291  usb_endpoints[i].event_process = 0;
292  }
293  /* Put buffer table at beginning of buffer memory */
294  USB->BTABLE = 0;
295  usb_arch_reset();
296  GPIOA->BSRR = GPIO_BSRR_BS10;
297  USB->CNTR |= (USB_CNTR_CTRM | USB_CNTR_PMAOVRM | USB_CNTR_ERRM
298  | USB_CNTR_WKUPM| USB_CNTR_SUSPM | USB_CNTR_RESETM);
299  NVIC_SET_PRIORITY(USB_LP_CAN_RX0_IRQChannel, 4);
300  NVIC_ENABLE_INT(USB_LP_CAN_RX0_IRQChannel);
301 }
302 
303 #define EPR_RW (USB_EP0R_EP_TYPE|USB_EP0R_EP_KIND|USB_EP0R_EA)
304 #define EPR_W0 (USB_EP0R_CTR_RX|USB_EP0R_CTR_TX)
305 #define EPR_TOGGLE (USB_EP0R_DTOG_RX | USB_EP0R_STAT_RX \
306  | USB_EP0R_DTOG_TX | USB_EP0R_STAT_TX)
307 
308 #define EPR_INVARIANT(epr) ((epr & (EPR_RW)) | EPR_W0)
309 
310 #define EPR_TOGGLE_SET(epr, mask, set) \
311 ((((epr) & (EPR_RW | (mask))) | EPR_W0) ^ (set))
312 
313 static void
314 usb_arch_setup_endpoint(unsigned char addr)
315 {
316  USBEndpoint *ep = EP_STRUCT(addr);
317  ep->status = 0;
318  ep->flags = USB_EP_FLAGS_ENABLED;
319  ep->buffer = 0;
320  ep->addr = addr;
321  ep->events = 0;
322  ep->xfer_size = 0;
323 };
324 
325 void
326 usb_arch_setup_control_endpoint(unsigned char addr)
327 {
328  USB_HW_Buffer *buf_desc;
329  unsigned int ei = EP_HW_NUM(addr);
330  unsigned int epr;
331  USBEndpoint *ep = EP_STRUCT(addr);
332  usb_arch_setup_endpoint(addr);
333  ep->flags |= USB_EP_FLAGS_TYPE_CONTROL;
334 
335  buf_desc = USB_EP_BUF_DESC(ei);
336  buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
337  buf_desc->COUNT_TX = USB_EP_BUF_SIZE(ei)/2;
338  buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei) + USB_EP_BUF_SIZE(ei)/2;
339  buf_desc->COUNT_RX = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
340  ep->xfer_size = USB_EP_BUF_SIZE(ei)/2;
341  epr = USB->EPR[EP_HW_NUM(addr)];
342  /* Clear interrupt flags */
343  epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
344  /* NACK both directions */
345  epr ^= USB_EPxR_STAT_RX_NAK | USB_EPxR_STAT_TX_NAK;
346  /* Set control type */
347  epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
348  | USB_EPxR_EP_TYPE_CONTROL);
349  /* Set address */
350  epr = ((epr & ~USB_EP0R_EA) | addr);
351  USB->EPR[EP_HW_NUM(addr)] = epr;
352 }
353 
354 void
355 usb_arch_setup_bulk_endpoint(unsigned char addr)
356 {
357  USB_HW_Buffer *buf_desc;
358  unsigned int ei = EP_HW_NUM(addr);
359  unsigned int epr;
360  USBEndpoint *ep = EP_STRUCT(addr);
361  usb_arch_setup_endpoint(addr);
362  ep->flags |= USB_EP_FLAGS_TYPE_BULK;
363 
364  buf_desc = USB_EP_BUF_DESC(ei);
365  buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
366  buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei) + USB_EP_BUF_SIZE(ei)/2;
367  epr = USB->EPR[ei];
368  if (addr & 0x80) {
369  /* IN */
370  buf_desc->COUNT_TX_0 = 0;
371  buf_desc->COUNT_TX_1 = 0;
372  /* VALID transmission */
373  epr ^= USB_EPxR_STAT_TX_VALID;
374  } else {
375  /* OUT */
376  buf_desc->COUNT_RX_0 = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
377  buf_desc->COUNT_RX_1 = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
378 
379  /* VALID reception */
380  epr ^= USB_EPxR_STAT_RX_VALID;
381  }
382  ep->xfer_size = USB_EP_BUF_SIZE(ei)/2;
383  /* Clear interrupt flags */
384  epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
385  /* Set bulk type */
386  epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
387  | USB_EPxR_EP_TYPE_BULK | USB_EPxR_EP_DBL_BUF);
388  /* Set address */
389  epr = ((epr & ~USB_EP0R_EA) | addr);
390  USB->EPR[ei] = epr;
391 
392 }
393 
394 void
395 usb_arch_setup_interrupt_endpoint(unsigned char addr)
396 {
397  USB_HW_Buffer *buf_desc;
398  unsigned int ei = EP_HW_NUM(addr);
399  unsigned int epr;
400  USBEndpoint *ep = EP_STRUCT(addr);
401  usb_arch_setup_endpoint(addr);
402  ep->flags |= USB_EP_FLAGS_TYPE_INTERRUPT;
403 
404  epr = USB->EPR[EP_HW_NUM(addr)];
405 
406  buf_desc = USB_EP_BUF_DESC(ei);
407  if (addr & 0x80) {
408  /* IN */
409  buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
410  buf_desc->COUNT_TX = USB_EP_BUF_SIZE(ei);
411  epr ^= USB_EPxR_STAT_TX_NAK;
412  } else {
413  /* OUT */
414  buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei);
415  buf_desc->COUNT_RX = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei));
416  epr ^= USB_EPxR_STAT_RX_NAK;
417  }
418  ep->xfer_size = USB_EP_BUF_SIZE(ei);
419  /* Clear interrupt flags */
420  epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
421  /* Set control type */
422  epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
423  | USB_EPxR_EP_TYPE_INTERRUPT);
424  /* Set address */
425  epr = ((epr & ~USB_EP0R_EA) | addr);
426  USB->EPR[EP_HW_NUM(addr)] = epr;
427 }
428 
429 void
430 usb_arch_disable_endpoint(uint8_t addr)
431 {
432  unsigned int epr;
433  USBEndpoint *ep = EP_STRUCT(addr);
434  ep->flags &= ~USB_EP_FLAGS_ENABLED;
435 
436  epr = USB->EPR[EP_HW_NUM(addr)];
437 
438  epr ^= USB_EPxR_STAT_TX_DISABLED | USB_EPxR_STAT_RX_DISABLED;
439  /* Clear interrupt flags */
440  epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
441  USB->EPR[EP_HW_NUM(addr)] = epr;
442 }
443 
444 inline void
445 stall_bulk_in(unsigned int hw_ep)
446 {
447  volatile uint32_t *eprp = &USB->EPR[hw_ep];
448  *eprp = (*eprp & (EPR_RW | USB_EP0R_STAT_TX_1)) | EPR_W0;
449  PRINTF("HALT IN\n");
450 }
451 
452 inline void
453 stall_bulk_out(unsigned int hw_ep)
454 {
455  volatile uint32_t *eprp = &USB->EPR[hw_ep];
456  *eprp = (*eprp & ((EPR_RW | USB_EP0R_STAT_RX_1) & ~USB_EP0R_CTR_RX)) |EPR_W0;
457  PRINTF("HALT OUT\n");
458 }
459 
460 
461 #define USB_READ_BLOCK 0x01 /* The currently submitted buffers
462  can't hold the received data, wait
463  for more buffers. No data was read
464  from the hardware buffer */
465 #define USB_READ_NOTIFY 0x02 /* Some buffers that had the
466  USB_BUFFER_NOTIFY flags set were
467  released */
468 #define USB_READ_FAIL 0x04 /* The received data doesn't match the
469  submitted buffers. The hardware
470  buffer is discarded. */
471 
472 inline unsigned int
473 ep_capacity(unsigned int count)
474 {
475  return (((count & USB_COUNT0_RX_NUM_BLOCK)>>10)
476  * ((count & USB_COUNT0_RX_BLSIZE) ? 32 : 2));
477 }
478 
479 /* Skip buffers until mask and flags matches*/
480 static USBBuffer *
481 skip_buffers_until(USBBuffer *buffer, unsigned int mask, unsigned int flags,
482  unsigned int *resp)
483 {
484  while(buffer && !((buffer->flags & mask) == flags)) {
485  USBBuffer *next = buffer->next;
486  buffer->flags &= ~USB_BUFFER_SUBMITTED ;
487  buffer->flags |= USB_BUFFER_FAILED;
488  if (buffer->flags & USB_BUFFER_NOTIFY) *resp |= USB_READ_NOTIFY;
489  buffer = next;
490  }
491  return buffer;
492 }
493 
494 static void
495 read_hw_buffer(USBBuffer *buffer, unsigned int offset, unsigned int len)
496 {
497 #ifdef USB_STM32F103_ENABLE_ALT_COPY
498  if (buffer->flags & USB_BUFFER_ARCH_ALT_COPY) {
499  copy_from_hw_buffer(buffer, offset, len);
500  } else
501 #endif
502  {
503  uint8_t *data = buffer->data;
504  const uint32_t *hw_data = ((u32*)USB_MEM_BASE) + offset/2;
505  buffer->data += len;
506  if (offset & 1) {
507  *data++ = *hw_data++ >> 8;
508  len--;
509  }
510  while(len >= 2) {
511  *((uint16_t*)data) = *hw_data++;
512  data += 2;
513  len -= 2;
514  }
515  if (len == 1) {
516  *data++ = *hw_data;
517  }
518  }
519 }
520 
521 
522 #define USB_WRITE_BLOCK 0x01
523 #define USB_WRITE_NOTIFY 0x02
524 
525 void
526 write_hw_buffer(USBBuffer *buffer,unsigned int offset, unsigned int len)
527 {
528 #ifdef USB_STM32F103_ENABLE_ALT_COPY
529  if (buffer->flags & USB_BUFFER_ARCH_ALT_COPY) {
530  copy_to_hw_buffer(buffer, offset, len);
531  } else
532 #endif
533  {
534  const uint8_t *data;
535  uint32_t *hw_data;
536  if (len == 0) return;
537  data = buffer->data;
538  hw_data = ((u32*)USB_MEM_BASE) + offset/2;
539  buffer->data += len;
540  if (offset & 1) {
541  *hw_data = (*hw_data & 0xff) | (*data++ << 8);
542  hw_data++;
543  len--;
544  }
545  while(len >= 2) {
546  *hw_data++ = *((uint16_t*)data) ;
547  data += 2;
548  len -= 2;
549  }
550  if (len == 1) {
551  *hw_data = *data++;
552  }
553  }
554 }
555 
556 static unsigned int
557 get_receive_capacity(USBBuffer *buffer)
558 {
559  unsigned int capacity = 0;
560  while(buffer && !(buffer->flags & (USB_BUFFER_IN| USB_BUFFER_SETUP|USB_BUFFER_HALT))) {
561  capacity += buffer->left;
562  buffer = buffer->next;
563  }
564  return capacity;
565 }
566 
567 static int
568 handle_pending_receive(USBEndpoint *ep)
569 {
570  int short_packet;
571  unsigned int len;
572  unsigned int copy;
573  unsigned int res = 0;
574  unsigned int hw_offset;
575  unsigned int hw_ep = EP_HW_NUM(ep->addr);
576  USBBuffer *buffer = ep->buffer;
577  unsigned int flags = ep->flags;
578  USB_HW_Buffer *buf_desc = USB_EP_BUF_DESC(hw_ep);
579  PRINTF("handle_pending_receive:\n");
580  if (!(flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_READ_BLOCK;
581  switch(flags & USB_EP_FLAGS_TYPE_MASK) {
582  case USB_EP_FLAGS_TYPE_CONTROL:
583  len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
584  if (flags & USB_EP_FLAGS_SETUP_PENDING) {
585  /* Discard buffers until we find a SETUP buffer */
586  buffer =
587  skip_buffers_until(buffer, USB_BUFFER_SETUP, USB_BUFFER_SETUP, &res);
588  ep->buffer = buffer;
589  if (!buffer || buffer->left < len) {
590  res |= USB_READ_BLOCK;
591  return res;
592  }
593  /* SETUP buffer must fit in a single buffer */
594  if (buffer->left < len) {
595  buffer->flags |= USB_BUFFER_FAILED;
596  buffer->flags &= ~USB_BUFFER_SUBMITTED ;
597  if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
598  ep->buffer = buffer->next;
599  res |= USB_READ_FAIL;
600  return res;
601  }
602  } else {
603  if (buffer->flags & (USB_BUFFER_SETUP|USB_BUFFER_IN)) {
604  buffer->flags |= USB_BUFFER_FAILED;
605 
606  buffer->flags &= ~USB_BUFFER_SUBMITTED ;
607  if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
608  ep->buffer = buffer->next;
609  res |= USB_READ_FAIL;
610  return res;
611  }
612 
613  if (len == 0) {
614  /* Status OUT */
615  if (buffer->left > 0) {
616  buffer->flags |= USB_BUFFER_FAILED;
617  res |= USB_READ_FAIL;
618  }
619  buffer->flags &= ~USB_BUFFER_SUBMITTED ;
620  if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
621  ep->buffer = buffer->next;
622  return res;
623  }
624  if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
625  }
626  hw_offset = buf_desc->ADDR_RX;
627  break;
628  case USB_EP_FLAGS_TYPE_INTERRUPT:
629  len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
630  if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
631  hw_offset = buf_desc->ADDR_RX;
632  break;
633  case USB_EP_FLAGS_TYPE_BULK:
634  if (USB->EPR[hw_ep] & USB_EPxR_SW_BUF_RX) {
635  len = buf_desc->COUNT_RX_1 & USB_COUNT0_RX_COUNT0_RX;
636  hw_offset = buf_desc->ADDR_RX_1;
637  } else {
638  len = buf_desc->COUNT_RX_0 & USB_COUNT0_RX_COUNT0_RX;
639  hw_offset = buf_desc->ADDR_RX_0;
640  }
641  if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
642  break;
643  case USB_EP_FLAGS_TYPE_ISO:
644  len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
645  if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
646  hw_offset = buf_desc->ADDR_RX;
647  }
648  /* printf("handle_pending_receive: %d %04x\n", len, ep->flags); */
649  short_packet = len < ep->xfer_size;
650 
651  do {
652  if (buffer->left < len) {
653  copy = buffer->left;
654  } else {
655  copy = len;
656  }
657  len -= copy;
658  buffer->left -= copy;
659  read_hw_buffer(buffer, hw_offset, copy);
660  hw_offset += copy;
661 
662  if (len == 0) break;
663 
664  /* Release buffer */
665  buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
666  if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
667  /* Use next buffer. */
668  buffer = buffer->next;
669  } while(1);
670 
671  if (short_packet) {
672  buffer->flags |= USB_BUFFER_SHORT_PACKET;
673  }
674 
675  if ((buffer->left == 0)
676  || (buffer->flags & USB_BUFFER_PACKET_END)
677  || (short_packet && (buffer->flags & USB_BUFFER_SHORT_END))) {
678  /* Release buffer */
679  buffer->flags &= ~USB_BUFFER_SUBMITTED;
680  if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
681  /* Use next buffer. */
682  buffer = buffer->next;
683  }
684 
685  ep->buffer = buffer;
686  if (IS_BULK_EP(ep)) {
687  USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) | USB_EPxR_SW_BUF_RX;
688  }
689 
690  /* PRINTF("read_endpoint %d %d\n", (int)hw_offset-buf_desc->ADDR_RX, (int)buf_desc->ADDR_RX); */
691  return res;
692 }
693 
694 
695 static void
696 start_receive(USBEndpoint *ep)
697 {
698  unsigned int hw_ep = EP_HW_NUM(ep->addr);
699  uint32_t epr = (USB->EPR[hw_ep] | EPR_W0);
700  uint32_t epr_mask = EPR_RW | EPR_W0;
701  switch(ep->flags & USB_EP_FLAGS_TYPE_MASK) {
702  case USB_EP_FLAGS_TYPE_CONTROL:
703  case USB_EP_FLAGS_TYPE_INTERRUPT:
704  {
705  unsigned int capacity = get_receive_capacity(ep->buffer);
706  if (capacity <= ep->xfer_size) {
707  /* This is the last OUT packet of the data stage */
708  epr ^= USB_EPxR_STAT_TX_NAK;
709  } else {
710  epr ^= USB_EPxR_STAT_TX_STALL;
711  }
712  epr ^= USB_EPxR_STAT_RX_VALID;
713  epr_mask |= USB_EP0R_STAT_TX | USB_EP0R_STAT_RX;
714  }
715  break;
716  case USB_EP_FLAGS_TYPE_BULK:
717  case USB_EP_FLAGS_TYPE_ISO:
718  break;
719  }
720  ep->flags |= USB_EP_FLAGS_RECEIVING;
721  USB->EPR[hw_ep] = epr & epr_mask;
722 }
723 
724 static unsigned int
725 get_transmit_length(USBBuffer *buffer)
726 {
727  unsigned int length = 0;
728  while(buffer && (buffer->flags & USB_BUFFER_IN)) {
729  length += buffer->left;
730  buffer = buffer->next;
731  }
732  return length;
733 }
734 
735 static int
736 start_transmit(USBEndpoint *ep)
737 {
738  unsigned int hw_start;
739  unsigned int res = 0;
740  USBBuffer *buffer = ep->buffer;
741  unsigned int len;
742  unsigned int hw_offset;
743  volatile uint32_t *hw_countp;
744  unsigned int hw_ep = EP_HW_NUM(ep->addr);
745  uint32_t epr = USB->EPR[hw_ep];
746  unsigned int ep_flags = ep->flags;
747  USB_HW_Buffer *buf_desc = USB_EP_BUF_DESC(hw_ep);
748  len = ep->xfer_size;
749  if (!(ep_flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_WRITE_BLOCK;
750  /* PRINTF("start_transmit: %02x\n", ep->addr); */
751  switch(ep_flags & USB_EP_FLAGS_TYPE_MASK) {
752  case USB_EP_FLAGS_TYPE_CONTROL:
753 
754  if (get_transmit_length(ep->buffer) <= len) {
755  /* This is the last IN packet of the data stage */
756  USB->EPR[hw_ep] = USB_EPxR_EP_STATUS_OUT
757  | EPR_TOGGLE_SET(epr, USB_EP0R_STAT_RX, USB_EPxR_STAT_RX_NAK);
758  } else {
759  USB->EPR[hw_ep] = USB_EPxR_EP_STATUS_OUT
760  | EPR_TOGGLE_SET(epr, USB_EP0R_STAT_RX, USB_EPxR_STAT_RX_STALL);
761  }
762  hw_offset = buf_desc->ADDR_TX;
763  hw_countp = &buf_desc->COUNT_TX;
764  break;
765  case USB_EP_FLAGS_TYPE_BULK:
766  if (buffer->flags & USB_BUFFER_HALT) {
767  if (ep->status & 0x01) return USB_WRITE_BLOCK;
768  ep->status |= 0x01;
769  stall_bulk_in(hw_ep);
770  return USB_WRITE_BLOCK;
771  }
772  if (USB->EPR[hw_ep] & USB_EPxR_SW_BUF_TX) {
773  hw_offset = buf_desc->ADDR_TX_1;
774  hw_countp = &buf_desc->COUNT_TX_1;
775  } else {
776  hw_offset = buf_desc->ADDR_TX_0;
777  hw_countp = &buf_desc->COUNT_TX_0;
778  }
779  break;
780  }
781  hw_start = hw_offset;
782  while (buffer) {
783  unsigned int copy;
784  if (buffer->left < len) {
785  copy = buffer->left;
786  } else {
787  copy = len;
788  }
789  len -= copy;
790  buffer->left -= copy;
791  write_hw_buffer(buffer, hw_offset, copy);
792  hw_offset += copy;
793  if (buffer->left == 0) {
794  if (buffer->flags & USB_BUFFER_SHORT_END) {
795  if (len == 0) {
796  /* Send zero length packet. */
797  break; /* Leave without moving to next buffer */
798  } else {
799  len = 0;
800  }
801  }
802  /* Release buffer */
803  buffer->flags &= ~USB_BUFFER_SUBMITTED;
804  if (buffer->flags & USB_BUFFER_NOTIFY) res = USB_WRITE_NOTIFY;
805  /* Use next buffer. */
806  buffer = buffer->next;
807  }
808  if (len == 0) break;
809  }
810  ep->buffer = buffer;
811  if (ep->flags & USB_EP_FLAGS_TRANSMITTING) {
812  ep->flags |= USB_EP_FLAGS_DOUBLE;
813  } else {
814  ep->flags |= USB_EP_FLAGS_TRANSMITTING;
815  }
816  *hw_countp = hw_offset - hw_start;
817  /* printf("start_transmit: %02x %d %04lx\n", ep->addr, hw_offset - hw_start, USB->EPR[hw_ep]); */
818  switch(ep->flags & USB_EP_FLAGS_TYPE_MASK) {
819  case USB_EP_FLAGS_TYPE_CONTROL:
820  case USB_EP_FLAGS_TYPE_INTERRUPT:
821  USB->EPR[hw_ep] =
822  EPR_TOGGLE_SET(epr, USB_EP0R_STAT_TX, USB_EPxR_STAT_TX_VALID);
823  break;
824  case USB_EP_FLAGS_TYPE_BULK:
825  USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) | USB_EPxR_SW_BUF_TX;
826  break;
827  case USB_EP_FLAGS_TYPE_ISO:
828  break;
829  }
830 /* printf("start_transmit: %04x\n", USB->EPR[hw_ep]); */
831  return res;
832 }
833 
834 static void
835 start_transfer(USBEndpoint *ep)
836 {
837  int res;
838  while (1) {
839  if (!(ep->addr & 0x80) && (IS_BULK_EP(ep) || IS_INTERRUPT_EP(ep))) {
840  if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
841  if (ep->status & 0x01) return ;
842  ep->status |= 0x01;
843  stall_bulk_out(EP_HW_NUM(ep->addr));
844  return;
845  }
846  }
847  if (!(ep->flags & USB_EP_FLAGS_RECV_PENDING)) break;
848  res = handle_pending_receive(ep);
849  if (res & USB_READ_NOTIFY) {
850  notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
851  }
852  if (res & USB_READ_BLOCK) return;
853  if (ep->flags & USB_EP_FLAGS_DOUBLE) {
854  ep->flags &= ~USB_EP_FLAGS_DOUBLE;
855  } else {
856  ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING|USB_EP_FLAGS_SETUP_PENDING);
857  }
858  if (res & USB_READ_FAIL) {
859  /* Only fails for control endpoints */
860  usb_arch_control_stall(ep->addr);
861  return;
862  }
863  }
864  if (ep->addr == 0x02)
865  PRINTF("start EPR: %04x ep->flags: %02x\n",
866  (unsigned int)USB->EPR[EP_HW_NUM(ep->addr)],
867  (unsigned int)ep->flags);
868  if (ep->flags & (USB_EP_FLAGS_TRANSMITTING | USB_EP_FLAGS_RECEIVING)) {
869  if (!IS_BULK_EP(ep) || (ep->flags & USB_EP_FLAGS_DOUBLE)) {
870  PRINTF("Busy\n");
871  return;
872  }
873  }
874  if (ep->status & 0x01) return; /* Don't start transfer if halted */
875  if (ep->buffer) {
876  if (ep->buffer->flags & USB_BUFFER_IN) {
877  res = start_transmit(ep);
878  if (res & USB_READ_NOTIFY) {
879  notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
880  }
881  } else {
882  start_receive(ep);
883  }
884  }
885 }
886 
887 
888 static void
889 transfer_complete(unsigned int hw_ep) {
890  uint32_t epr = USB->EPR[hw_ep];
891  USBEndpoint *ep = &usb_endpoints[hw_ep];
892  if (epr &USB_EP0R_CTR_RX) {
893  PRINTF("Received packet %lx %04x\n", USB_EP_BUF_DESC(hw_ep)->COUNT_RX, (int)USB->EPR[hw_ep]);
894  if (epr & USB_EP0R_SETUP) {
895  PRINTF("SETUP\n");
896  ep->flags |= USB_EP_FLAGS_SETUP_PENDING;
897  }
898 
899  if (IS_BULK_EP(ep)) {
900  if ((epr ^ (epr >> 8)) & USB_EP0R_DTOG_TX) {
901  ep->flags &= ~USB_EP_FLAGS_DOUBLE;
902  } else {
903  ep->flags |= USB_EP_FLAGS_DOUBLE;
904  ep->flags &= ~USB_EP_FLAGS_RECEIVING;
905  }
906  } else {
907  ep->flags &= ~USB_EP_FLAGS_RECEIVING;
908  }
909  ep->flags |= USB_EP_FLAGS_RECV_PENDING;
910  if (IS_CONTROL_EP(ep)) epr &= ~USB_EPxR_EP_STATUS_OUT;
911  USB->EPR[hw_ep] = EPR_INVARIANT(epr) & ~USB_EP0R_CTR_RX;
912 #if 0
913  if (ep->flags & USB_EP_FLAGS_DOUBLE) {
914  printf("Double\n");
915  }
916 #endif
917 
918  start_transfer(ep);
919  }
920  if (epr &USB_EP0R_CTR_TX) {
921  PRINTF("Sent packet\n");
922  if (ep->flags & USB_EP_FLAGS_DOUBLE) {
923  ep->flags &= ~USB_EP_FLAGS_DOUBLE;
924  } else {
925  ep->flags &= ~USB_EP_FLAGS_TRANSMITTING;
926  }
927  USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) & ~USB_EP0R_CTR_TX;
928  start_transfer(ep);
929  }
930 
931 }
932 
933 
934 void
935 usb_set_ep_event_process(unsigned char addr, struct process *p)
936 {
937  USBEndpoint *ep = &usb_endpoints[EP_INDEX(addr)];
938  ep->event_process = p;
939 }
940 
941 /* Select what process should be polled when a global event occurs */
942 void
943 usb_arch_set_global_event_process(struct process *p)
944 {
945  event_process = p;
946 }
947 
948 unsigned int
949 usb_arch_get_global_events(void)
950 {
951  unsigned int e;
952  USB_DISABLE_INT;
953  e = events;
954  events = 0;
955  USB_DISABLE_INT;
956  return e;
957 }
958 
959 unsigned int
960 usb_get_ep_events(unsigned char addr)
961 {
962  unsigned int e;
963  unsigned int ei = EP_HW_NUM(addr);
964  USB_DISABLE_INT;
965  e = usb_endpoints[ei].events;
966  usb_endpoints[ei].events = 0;
967  USB_ENABLE_INT;
968  return e;
969 }
970 
971 
972 void
973 usb_submit_recv_buffer(unsigned char ep_addr, USBBuffer *buffer)
974 {
975  USBBuffer **tailp;
976  USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
977  if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
978  /* PRINTF("buffer: %p\n", ep->buffer); */
979  /* dbg_drain(); */
980  USB_DISABLE_INT;
981  tailp = (USBBuffer**)&ep->buffer;
982  while(*tailp) {
983  tailp = &(*tailp)->next;
984  }
985  *tailp = buffer;
986  while(buffer) {
987  buffer->flags |= USB_BUFFER_SUBMITTED;
988  buffer = buffer->next;
989  }
990  start_transfer(ep);
991 
992  USB_ENABLE_INT;
993 }
994 
995 void
996 usb_submit_xmit_buffer(unsigned char ep_addr, USBBuffer *buffer)
997 {
998  USBBuffer **tailp;
999  USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
1000  if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
1001  /* PRINTF("usb_submit_xmit_buffer %d\n", buffer->left); */
1002  USB_DISABLE_INT;
1003  tailp = (USBBuffer**)&ep->buffer;
1004  while(*tailp) {
1005  tailp = &(*tailp)->next;
1006  }
1007  *tailp = buffer;
1008  while(buffer) {
1009  buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
1010  buffer = buffer->next;
1011  }
1012  start_transfer(ep);
1013  USB_ENABLE_INT;
1014 }
1015 
1016 void
1017 usb_arch_discard_all_buffers(unsigned char ep_addr)
1018 {
1019  uint32_t ints;
1020  USBBuffer *buffer;
1021  volatile USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
1022  ints = usb_save_disable_int();
1023  buffer = ep->buffer;
1024  ep->buffer = NULL;
1025 #if 0
1026  /* Set both directions to NAK */
1027  USB->EPR[EP_HW_NUM(ep_addr)] =
1028  EPR_TOGGLE_SET(USB->EPR[EP_HW_NUM(ep_addr)],
1029  USB_EP0R_STAT_RX|USB_EP0R_STAT_TX,
1030  USB_EPxR_STAT_TX_NAK| USB_EPxR_STAT_RX_NAK);
1031  ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING|USB_EP_FLAGS_SETUP_PENDING);
1032 #endif
1033  ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING | USB_EP_FLAGS_SETUP_PENDING
1034  | USB_EP_FLAGS_DOUBLE);
1035  usb_restore_int(ints);
1036  while(buffer) {
1037  buffer->flags &= ~USB_BUFFER_SUBMITTED;
1038  buffer = buffer->next;
1039  }
1040 }
1041 uint16_t
1042 usb_arch_get_ep_status(uint8_t addr)
1043 {
1044  if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return 0;
1045  return usb_endpoints[EP_INDEX(addr)].status;
1046 }
1047 
1048 void
1049 usb_arch_set_configuration(uint8_t usb_configuration_value)
1050 {
1051  /* Nothing needs to be done */
1052 }
1053 
1054 void
1055 usb_arch_control_stall(unsigned char addr)
1056 {
1057  if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return;
1058  uint32_t epr = USB->EPR[EP_HW_NUM(addr)];
1059  USB->EPR[EP_HW_NUM(addr)] = EPR_TOGGLE_SET(epr,USB_EP0R_STAT_RX|USB_EP0R_STAT_TX, USB_EPxR_STAT_RX_STALL | USB_EPxR_STAT_TX_STALL);
1060 }
1061 
1062 /* Not for control endpoints */
1063 void
1064 usb_arch_halt_endpoint(unsigned char ep_addr, int halt)
1065 {
1066  if (EP_INDEX(ep_addr) > USB_MAX_ENDPOINTS) return;
1067  if (!usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_ENABLED) return;
1068  USB_DISABLE_INT;
1069  if (halt) {
1070  if (!(usb_endpoints[EP_INDEX(ep_addr)].status & 0x01)) {
1071  usb_endpoints[EP_INDEX(ep_addr)].status |= 0x01;
1072  if (ep_addr & 0x80) {
1073  stall_bulk_in(EP_HW_NUM(ep_addr));
1074  } else {
1075  stall_bulk_out(EP_HW_NUM(ep_addr));
1076  }
1077  }
1078  } else {
1079  USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
1080  if (ep->status & 0x01) {
1081  ep->status &= ~0x01;
1082  PRINTF("HALT clear restart EPR: %04x %p %p\n",
1083  (unsigned int)USB->EPR[EP_HW_NUM(ep_addr)],
1084  ep->buffer, ep->buffer->next);
1085  /* Restore toggle state for double buffered endpoint */
1086  if (IS_BULK_EP(ep)) {
1087  volatile uint32_t *eprp = &USB->EPR[EP_HW_NUM(ep_addr)];
1088  if (ep_addr & 0x80) {
1089  ep->flags &= ~(USB_EP_FLAGS_DOUBLE |USB_EP_FLAGS_TRANSMITTING);
1090 
1091  *eprp =(EPR_TOGGLE_SET(*eprp,(USB_EP0R_STAT_TX | USB_EP0R_DTOG_TX
1092  | USB_EPxR_SW_BUF_TX),
1093  USB_EPxR_STAT_TX_VALID));
1094  } else {
1095  ep->flags &= ~(USB_EP_FLAGS_DOUBLE | USB_EP_FLAGS_RECEIVING
1096  | USB_EP_FLAGS_RECV_PENDING);
1097 
1098  *eprp =(EPR_TOGGLE_SET(*eprp,(USB_EP0R_STAT_RX | USB_EP0R_DTOG_RX
1099  | USB_EPxR_SW_BUF_RX),
1100  USB_EPxR_STAT_RX_VALID|USB_EPxR_SW_BUF_RX));
1101  *eprp = EPR_INVARIANT(*eprp) | USB_EPxR_SW_BUF_RX;
1102 
1103  }
1104  }
1105  /* Release HALT buffer */
1106  if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
1107  ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
1108  if (ep->buffer->flags & USB_BUFFER_NOTIFY) {
1109  notify_ep_process(ep,USB_EP_EVENT_NOTIFICATION);
1110  }
1111  ep->buffer = ep->buffer->next;
1112  }
1113  /* Restart transmission */
1114  start_transfer(&usb_endpoints[EP_INDEX(ep_addr)]);
1115  PRINTF("HALT clear restart EPR: %04x %p %p\n",
1116  (unsigned int)USB->EPR[EP_HW_NUM(ep_addr)],
1117  ep->buffer, ep->buffer->next);
1118 
1119  }
1120  }
1121  USB_ENABLE_INT;
1122 }
1123 
1124 void
1125 usb_arch_set_address(unsigned char addr)
1126 {
1127  USB->DADDR = 0x80 | addr;
1128 }
1129 
1130 void
1131 USB_HP_CAN_TX_handler(void) __attribute__((interrupt));
1132 
1133 void
1134 USB_HP_CAN_TX_handler(void)
1135 {
1136  uint32_t status = USB->ISTR;
1137  if (status & USB_ISTR_CTR) {
1138  transfer_complete(status & USB_ISTR_EP_ID);
1139  }
1140 }
1141 
1142 void
1143 USB_LP_CAN_RX0_handler(void) __attribute__((interrupt));
1144 void
1145 USB_LP_CAN_RX0_handler(void)
1146 {
1147  uint32_t status = USB->ISTR;
1148  if (status & USB_ISTR_CTR) {
1149  transfer_complete(status & USB_ISTR_EP_ID);
1150  /* PRINTF("Transfer complete ep %ld\n", status & USB_ISTR_EP_ID); */
1151  } else if (status & USB_ISTR_PMAOVR) {
1152  PRINTF("PMAOVR\n");
1153  USB->ISTR &= ~USB_ISTR_PMAOVR;
1154  } else if (status & USB_ISTR_ERR) {
1155  PRINTF("ERR\n");
1156  USB->ISTR &= ~USB_ISTR_ERR;
1157  } else if (status & USB_ISTR_WKUP) {
1158  PRINTF("WKUP\n");
1159  USB->ISTR &= ~USB_ISTR_WKUP;
1160  USB->CNTR &= ~USB_CNTR_FSUSP;
1161  notify_process(USB_EVENT_RESUME);
1162  } else if (status & USB_ISTR_SUSP) {
1163  PRINTF("SUSP\n");
1164  USB->ISTR &= ~USB_ISTR_SUSP;
1165  USB->CNTR |= USB_CNTR_FSUSP;
1166  notify_process(USB_EVENT_SUSPEND);
1167  } else if (status & USB_ISTR_RESET) {
1168  PRINTF("RESET\n");
1169  USB->ISTR &= ~USB_ISTR_RESET;
1170  usb_arch_reset();
1171  notify_process(USB_EVENT_RESET);
1172  }
1173 }
1174 
1175 void
1176 usb_arch_toggle_SW_BUF_RX()
1177 {
1178  USB->EPR[2] = EPR_INVARIANT(USB->EPR[2]) | USB_EPxR_SW_BUF_RX;
1179 }
1180 
1181 int
1182 usb_arch_send_pending(uint8_t ep_addr)
1183 {
1184  return usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_TRANSMITTING;
1185 }