1 #ifndef __NVIC_H__LE94F5JS4D__
2 #define __NVIC_H__LE94F5JS4D__
3 #include <stm32f10x_map.h>
4 #include <stm32f10x_nvic.h>
6 #define NVIC_ENABLE_INT(i) WRITE_REG(NVIC->ISER[(i)/32], 1<<((i) & 0x1f))
7 #define NVIC_DISABLE_INT(i) WRITE_REG(NVIC->ICER[(i)/32], 1<<((i) & 0x1f))
8 #define NVIC_SET_PENDING(i) WRITE_REG(NVIC->ISPR[(i)/32], 1<<((i) & 0x1f))
9 #define NVIC_CLEAR_PENDING(i) WRITE_REG(NVIC->ICPR[(i)/32], 1<<((i) & 0x1f))
11 #define NVIC_SET_PRIORITY(i,p) \
12 MODIFY_REG(NVIC->IPR[(i)/4], 0xf<<(((i)&3)*8), (p)<<(((i)&3)*8))
14 #define NVIC_SET_SYSTICK_PRI(p) MODIFY_REG(SCB->SHPR[2], 0xf<<24, (p)<<24)
