Contiki 2.5
hal.h
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1 /* Copyright (c) 2008, Swedish Institute of Computer Science
2  * All rights reserved.
3  *
4  * Additional fixes for AVR contributed by:
5  *
6  * Colin O'Flynn coflynn@newae.com
7  * Eric Gnoske egnoske@gmail.com
8  * Blake Leverett bleverett@gmail.com
9  * Mike Vidales mavida404@gmail.com
10  * Kevin Brown kbrown3@uccs.edu
11  * Nate Bohlmann nate@elfwerks.com
12  *
13  * All rights reserved.
14  *
15  * Redistribution and use in source and binary forms, with or without
16  * modification, are permitted provided that the following conditions are met:
17  *
18  * * Redistributions of source code must retain the above copyright
19  * notice, this list of conditions and the following disclaimer.
20  * * Redistributions in binary form must reproduce the above copyright
21  * notice, this list of conditions and the following disclaimer in
22  * the documentation and/or other materials provided with the
23  * distribution.
24  * * Neither the name of the copyright holders nor the names of
25  * contributors may be used to endorse or promote products derived
26  * from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
32  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /**
42  * \addtogroup hal
43  * @{
44  */
45 
46 /**
47  * \file
48  * \brief This file contains low-level radio driver code.
49  *
50  * $Id: hal.h,v 1.5 2010/02/26 21:15:28 dak664 Exp $
51 */
52 
53 #ifndef HAL_AVR_H
54 #define HAL_AVR_H
55 /*============================ INCLUDE =======================================*/
56 #include <stdint.h>
57 #include <stdbool.h>
58 #include <avr/io.h>
59 #include <avr/interrupt.h>
60 #include <util/crc16.h>
61 #include "contiki-conf.h"
62 /*============================ MACROS ========================================*/
63 
64 // TEST CODE
65 #define TRIG1 DDRB |= 0x04, PINB |= 0x04
66 #define TRIG2 DDRD |= 0x80, PIND |= 0x80
67 
68 /** \name This is the list of pin configurations needed for a given platform.
69  * \brief Change these values to port to other platforms.
70  * \{
71  */
72 /* Define all possible revisions here */
73 // Don't use zero, it will match if undefined!
74 // RAVEN_D : Raven kit with LCD display
75 // RAVENUSB_C : used for USB key or Raven card
76 // RCB_B : RZ200 kit from Atmel based on 1281V
77 // ZIGBIT : Zigbit module from Meshnetics
78 // IRIS : IRIS Mote from MEMSIC
79 #define RAVEN_D 4
80 #define RAVENUSB_C 1
81 #define RCB_B 2
82 #define ZIGBIT 3
83 #define IRIS 5
84 
85 
86 
87 
88 #if RCB_REVISION == RCB_B
89 /* 1281 rcb */
90 # define SSPORT B
91 # define SSPIN (0x00)
92 # define SPIPORT B
93 # define MOSIPIN (0x02)
94 # define MISOPIN (0x03)
95 # define SCKPIN (0x01)
96 # define RSTPORT B
97 # define RSTPIN (0x05)
98 # define IRQPORT D
99 # define IRQPIN (0x04)
100 # define SLPTRPORT B
101 # define SLPTRPIN (0x04)
102 # define USART 1
103 # define USARTVECT USART1_RX_vect
104 # define TICKTIMER 3
105 # define HAS_SPARE_TIMER
106 
107 #elif HARWARE_REVISION == ZIGBIT
108 /* 1281V Zigbit */
109 # define SSPORT B
110 # define SSPIN (0x00)
111 # define SPIPORT B
112 # define MOSIPIN (0x02)
113 # define MISOPIN (0x03)
114 # define SCKPIN (0x01)
115 # define RSTPORT A
116 # define RSTPIN (0x07)
117 # define IRQPORT E
118 # define IRQPIN (0x05)
119 # define SLPTRPORT B
120 # define SLPTRPIN (0x04)
121 # define TXCWPORT B
122 # define TXCWPIN (0x07)
123 # define USART 1
124 # define USARTVECT USART1_RX_vect
125 //# define TICKTIMER 3
126 //# define HAS_SPARE_TIMER // Not used
127 
128 
129 #elif RAVEN_REVISION == RAVEN_D
130 /* 1284 raven */
131 # define SSPORT B
132 # define SSPIN (0x04)
133 # define SPIPORT B
134 # define MOSIPIN (0x05)
135 # define MISOPIN (0x06)
136 # define SCKPIN (0x07)
137 # define RSTPORT B
138 # define RSTPIN (0x01)
139 # define IRQPORT D
140 # define IRQPIN (0x06)
141 # define SLPTRPORT B
142 # define SLPTRPIN (0x03)
143 # define TXCWPORT B
144 # define TXCWPIN (0x00)
145 # define USART 1
146 # define USARTVECT USART1_RX_vect
147 # define TICKTIMER 3
148 # define HAS_CW_MODE
149 # define HAS_SPARE_TIMER
150 
151 #elif RAVEN_REVISION == RAVENUSB_C
152 /* 1287USB raven */
153 # define SSPORT B
154 # define SSPIN (0x00)
155 # define SPIPORT B
156 # define MOSIPIN (0x02)
157 # define MISOPIN (0x03)
158 # define SCKPIN (0x01)
159 # define RSTPORT B
160 # define RSTPIN (0x05)
161 # define IRQPORT D
162 # define IRQPIN (0x04)
163 # define SLPTRPORT B
164 # define SLPTRPIN (0x04)
165 # define TXCWPORT B
166 # define TXCWPIN (0x07)
167 # define USART 1
168 # define USARTVECT USART1_RX_vect
169 # define TICKTIMER 3
170 # define HAS_CW_MODE
171 # define HAS_SPARE_TIMER
172 
173 #elif HARWARE_REVISION == IRIS
174 /* 1281 IRIS */
175 # define SSPORT B
176 # define SSPIN (0x00)
177 # define SPIPORT B
178 # define MOSIPIN (0x02)
179 # define MISOPIN (0x03)
180 # define SCKPIN (0x01)
181 # define RSTPORT A
182 # define RSTPIN (0x06)
183 # define IRQPORT D
184 # define IRQPIN (0x04)
185 # define SLPTRPORT B
186 # define SLPTRPIN (0x07)
187 //# define TXCWPORT B
188 //# define TXCWPIN (0x07)
189 # define USART 1
190 # define USARTVECT USART1_RX_vect
191 //# define TICKTIMER 3
192 //# define HAS_SPARE_TIMER // Not used
193 #else
194 
195 #error "Platform undefined in hal.h"
196 
197 #endif
198 
199 /** \} */
200 
201 /**
202  * \name Macros used to generate read register names from platform-specific definitions of ports.
203  * \brief The various CAT macros (DDR, PORT, and PIN) are used to
204  * assign port/pin/DDR names to various macro variables. The
205  * variables are assigned based on the specific connections made in
206  * the hardware. For example TCCR(TICKTIMER,A) can be used in place of TCCR0A
207  * if TICKTIMER is defined as 0.
208  * \{
209  */
210 #define CAT(x, y) x##y
211 #define CAT2(x, y, z) x##y##z
212 #define DDR(x) CAT(DDR, x)
213 #define PORT(x) CAT(PORT, x)
214 #define PIN(x) CAT(PIN, x)
215 #define UCSR(num, let) CAT2(UCSR,num,let)
216 #define RXEN(x) CAT(RXEN,x)
217 #define TXEN(x) CAT(TXEN,x)
218 #define TXC(x) CAT(TXC,x)
219 #define RXC(x) CAT(RXC,x)
220 #define RXCIE(x) CAT(RXCIE,x)
221 #define UCSZ(x,y) CAT2(UCSZ,x,y)
222 #define UBRR(x,y) CAT2(UBRR,x,y)
223 #define UDRE(x) CAT(UDRE,x)
224 #define UDRIE(x) CAT(UDRIE,x)
225 #define UDR(x) CAT(UDR,x)
226 #define TCNT(x) CAT(TCNT,x)
227 #define TIMSK(x) CAT(TIMSK,x)
228 #define TCCR(x,y) CAT2(TCCR,x,y)
229 #define COM(x,y) CAT2(COM,x,y)
230 #define OCR(x,y) CAT2(OCR,x,y)
231 #define CS(x,y) CAT2(CS,x,y)
232 #define WGM(x,y) CAT2(WGM,x,y)
233 #define OCIE(x,y) CAT2(OCIE,x,y)
234 #define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
235 #define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
236 #define RXVECT(x) CAT2(USART,x,_RX_vect)
237 /** \} */
238 
239 /**
240  * \name Pin macros
241  * \brief These macros convert the platform-specific pin defines into names and functions
242  * that the source code can directly use.
243  * \{
244  */
245 #define SLP_TR SLPTRPIN /**< Pin number that corresponds to the SLP_TR pin. */
246 #define DDR_SLP_TR DDR( SLPTRPORT ) /**< Data Direction Register that corresponds to the port where SLP_TR is connected. */
247 #define PORT_SLP_TR PORT( SLPTRPORT ) /**< Port (Write Access) where SLP_TR is connected. */
248 #define PIN_SLP_TR PIN( SLPTRPORT ) /**< Pin (Read Access) where SLP_TR is connected. */
249 #define hal_set_slptr_high( ) ( PORT_SLP_TR |= ( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin high. */
250 #define hal_set_slptr_low( ) ( PORT_SLP_TR &= ~( 1 << SLP_TR ) ) /**< This macro pulls the SLP_TR pin low. */
251 #define hal_get_slptr( ) ( ( PIN_SLP_TR & ( 1 << SLP_TR ) ) >> SLP_TR ) /**< Read current state of the SLP_TR pin (High/Low). */
252 #define RST RSTPIN /**< Pin number that corresponds to the RST pin. */
253 #define DDR_RST DDR( RSTPORT ) /**< Data Direction Register that corresponds to the port where RST is */
254 #define PORT_RST PORT( RSTPORT ) /**< Port (Write Access) where RST is connected. */
255 #define PIN_RST PIN( RSTPORT ) /**< Pin (Read Access) where RST is connected. */
256 #define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) ) /**< This macro pulls the RST pin high. */
257 #define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */
258 #define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST ) /**< Read current state of the RST pin (High/Low). */
259 #define HAL_SS_PIN SSPIN /**< The slave select pin. */
260 #define HAL_PORT_SPI PORT( SPIPORT ) /**< The SPI module is located on PORTB. */
261 #define HAL_DDR_SPI DDR( SPIPORT ) /**< Data Direction Register for PORTB. */
262 #define HAL_DD_SS SSPIN /**< Data Direction bit for SS. */
263 #define HAL_DD_SCK SCKPIN /**< Data Direction bit for SCK. */
264 #define HAL_DD_MOSI MOSIPIN /**< Data Direction bit for MOSI. */
265 #define HAL_DD_MISO MISOPIN /**< Data Direction bit for MISO. */
266 /** \} */
267 
268 
269 #define HAL_SS_HIGH( ) (HAL_PORT_SPI |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
270 #define HAL_SS_LOW( ) (HAL_PORT_SPI &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
271 
272 /** \brief Macros defined for HAL_TIMER1.
273  *
274  * These macros are used to define the correct setupt of the AVR's Timer1, and
275  * to ensure that the hal_get_system_time function returns the system time in
276  * symbols (16 us ticks).
277  */
278 
279 #if ( F_CPU == 16000000UL )
280  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
281  #define HAL_US_PER_SYMBOL ( 1 )
282  #define HAL_SYMBOL_MASK ( 0xFFFFffff )
283 #elif ( F_CPU == 8000000UL )
284  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
285  #define HAL_US_PER_SYMBOL ( 2 )
286  #define HAL_SYMBOL_MASK ( 0x7FFFffff )
287 #elif ( F_CPU == 4000000UL )
288  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) | ( 1 << CS10 ) )
289  #define HAL_US_PER_SYMBOL ( 1 )
290  #define HAL_SYMBOL_MASK ( 0xFFFFffff )
291 #elif ( F_CPU == 1000000UL )
292  #define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS11 ) )
293  #define HAL_US_PER_SYMBOL ( 2 )
294  #define HAL_SYMBOL_MASK ( 0x7FFFffff )
295 #else
296  #error "Clock speed not supported."
297 #endif
298 
299 #if HARWARE_REVISION == ZIGBIT
300 // IRQ E5 for Zigbit example
301 #define RADIO_VECT INT5_vect
302 #define HAL_ENABLE_RADIO_INTERRUPT( ) { ( EIMSK |= ( 1 << INT5 ) ) ; EICRB |= 0x0C ; PORTE &= ~(1<<PE5); DDRE &= ~(1<<DDE5); }
303 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( EIMSK &= ~( 1 << INT5 ) )
304 #else
305 #define RADIO_VECT TIMER1_CAPT_vect
306 #define HAL_ENABLE_RADIO_INTERRUPT( ) ( TIMSK1 |= ( 1 << ICIE1 ) )
307 #define HAL_DISABLE_RADIO_INTERRUPT( ) ( TIMSK1 &= ~( 1 << ICIE1 ) )
308 #endif
309 
310 #define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 |= ( 1 << TOIE1 ) )
311 #define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
312 
313 /** This macro will protect the following code from interrupts.*/
314 #define AVR_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
315 
316 /** This macro must always be used in conjunction with AVR_ENTER_CRITICAL_REGION
317  so that interrupts are enabled again.*/
318 #define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
319 
320 
321 /** \brief Enable the interrupt from the radio transceiver.
322  */
323 #define hal_enable_trx_interrupt( ) HAL_ENABLE_RADIO_INTERRUPT( )
324 
325 /** \brief Disable the interrupt from the radio transceiver.
326  *
327  * \retval 0 if the pin is low, 1 if the pin is high.
328  */
329 #define hal_disable_trx_interrupt( ) HAL_DISABLE_RADIO_INTERRUPT( )
330 /*============================ TYPDEFS =======================================*/
331 /*============================ PROTOTYPES ====================================*/
332 /*============================ MACROS ========================================*/
333 /** \name Macros for radio operation.
334  * \{
335  */
336 #define HAL_BAT_LOW_MASK ( 0x80 ) /**< Mask for the BAT_LOW interrupt. */
337 #define HAL_TRX_UR_MASK ( 0x40 ) /**< Mask for the TRX_UR interrupt. */
338 #define HAL_TRX_END_MASK ( 0x08 ) /**< Mask for the TRX_END interrupt. */
339 #define HAL_RX_START_MASK ( 0x04 ) /**< Mask for the RX_START interrupt. */
340 #define HAL_PLL_UNLOCK_MASK ( 0x02 ) /**< Mask for the PLL_UNLOCK interrupt. */
341 #define HAL_PLL_LOCK_MASK ( 0x01 ) /**< Mask for the PLL_LOCK interrupt. */
342 
343 #define HAL_MIN_FRAME_LENGTH ( 0x03 ) /**< A frame should be at least 3 bytes. */
344 #define HAL_MAX_FRAME_LENGTH ( 0x7F ) /**< A frame should no more than 127 bytes. */
345 /** \} */
346 /*============================ TYPDEFS =======================================*/
347 /** \struct hal_rx_frame_t
348  * \brief This struct defines the rx data container.
349  *
350  * \see hal_frame_read
351  */
352 typedef struct{
353  uint8_t length; /**< Length of frame. */
354  uint8_t data[ HAL_MAX_FRAME_LENGTH ]; /**< Actual frame data. */
355  uint8_t lqi; /**< LQI value for received frame. */
356  bool crc; /**< Flag - did CRC pass for received frame? */
358 
359 /** RX_START event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_rx_start_event_handler(). */
360 typedef void (*hal_rx_start_isr_event_handler_t)(uint32_t const isr_timestamp, uint8_t const frame_length);
361 
362 /** RRX_END event handler callback type. Is called with timestamp in IEEE 802.15.4 symbols and frame length. See hal_set_trx_end_event_handler(). */
363 typedef void (*hal_trx_end_isr_event_handler_t)(uint32_t const isr_timestamp);
364 
365 typedef void (*rx_callback_t) (uint16_t data);
366 
367 /*============================ PROTOTYPES ====================================*/
368 void hal_init( void );
369 
370 void hal_reset_flags( void );
371 uint8_t hal_get_bat_low_flag( void );
372 void hal_clear_bat_low_flag( void );
373 
375 void hal_set_trx_end_event_handler( hal_trx_end_isr_event_handler_t trx_end_callback_handle );
377 
381 
382 uint8_t hal_get_pll_lock_flag( void );
383 void hal_clear_pll_lock_flag( void );
384 
385 uint8_t hal_register_read( uint8_t address );
386 void hal_register_write( uint8_t address, uint8_t value );
387 uint8_t hal_subregister_read( uint8_t address, uint8_t mask, uint8_t position );
388 void hal_subregister_write( uint8_t address, uint8_t mask, uint8_t position,
389  uint8_t value );
390 void hal_frame_read(hal_rx_frame_t *rx_frame, rx_callback_t rx_callback);
391 void hal_frame_write( uint8_t *write_buffer, uint8_t length );
392 void hal_sram_read( uint8_t address, uint8_t length, uint8_t *data );
393 void hal_sram_write( uint8_t address, uint8_t length, uint8_t *data );
394 
395 #endif
396 /** @} */
397 /*EOF*/