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cpu
mc1322x
lib
include
asm.h
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef ASM_H
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#define ASM_H
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/* Structure-based register definitions */
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/* Example use:
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ASM->KEY0 = 0xaabbccdd;
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ASM->CONTROL1bits = (struct ASM_CONTROL1) {
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.MASK_IRQ = 1,
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.CBC = 1,
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};
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ASM->CONTROL1bits.SELF_TEST = 1;
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*/
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struct
ASM_struct {
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uint32_t KEY0;
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uint32_t KEY1;
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uint32_t KEY2;
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uint32_t KEY3;
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uint32_t DATA0;
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uint32_t DATA1;
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uint32_t DATA2;
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uint32_t DATA3;
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uint32_t CTR0;
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uint32_t CTR1;
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uint32_t CTR2;
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uint32_t CTR3;
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uint32_t CTR0_RESULT;
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uint32_t CTR1_RESULT;
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uint32_t CTR2_RESULT;
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uint32_t CTR3_RESULT;
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uint32_t CBC0_RESULT;
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uint32_t CBC1_RESULT;
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uint32_t CBC2_RESULT;
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uint32_t CBC3_RESULT;
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union
{
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uint32_t CONTROL0;
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struct
ASM_CONTROL0 {
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uint32_t :24;
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uint32_t START:1;
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uint32_t CLEAR:1;
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uint32_t LOAD_MAC:1;
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uint32_t :4;
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uint32_t CLEAR_IRQ:1;
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} CONTROL0bits;
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};
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union
{
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uint32_t CONTROL1;
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struct
ASM_CONTROL1 {
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uint32_t ON:1;
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uint32_t NORMAL_MODE:1;
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uint32_t BYPASS:1;
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uint32_t :21;
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uint32_t CBC:1;
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uint32_t CTR:1;
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uint32_t SELF_TEST:1;
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uint32_t :4;
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uint32_t MASK_IRQ:1;
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} CONTROL1bits;
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};
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union
{
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uint32_t STATUS;
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struct
ASM_STATUS {
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uint32_t :24;
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uint32_t DONE:1;
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uint32_t TEST_PASS:1;
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uint32_t :6;
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} STATUSbits;
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};
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uint32_t reserved;
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uint32_t MAC0;
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uint32_t MAC1;
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uint32_t MAC2;
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uint32_t MAC3;
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};
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static
volatile
struct
ASM_struct *
const
ASM = (
void
*) (0x80008000);
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#endif
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