Contiki 2.5
crm.h
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #ifndef CRM_H
37 #define CRM_H
38 
39 #include <stdint.h>
40 
41 #define CRM_BASE (0x80003000)
42 
43 /* Structure-based CRM access */
44 struct CRM_struct {
45  union {
46  uint32_t SYS_CNTL;
47  struct CRM_SYS_CNTL {
48  uint32_t PWR_SOURCE:2;
49  uint32_t PADS_1P8V_SEL:1;
50  uint32_t :1;
51  uint32_t JTAG_SECU_OFF:1;
52  uint32_t XTAL32_EXISTS:1;
53  uint32_t :2;
54  uint32_t XTAL_CLKDIV:6;
55  uint32_t :18;
56  } SYS_CNTLbits;
57  };
58  union {
59  uint32_t WU_CNTL;
60  struct CRM_WU_CNTL {
61  uint32_t TIMER_WU_EN:1;
62  uint32_t RTC_WU_EN:1;
63  uint32_t HOST_WAKE:1;
64  uint32_t AUTO_ADC:1;
65  uint32_t EXT_WU_EN:4;
66  uint32_t EXT_WU_EDGE:4;
67  uint32_t EXT_WU_POL:4;
68  uint32_t TIMER_WU_IEN:1;
69  uint32_t RTC_WU_IEN:1;
70  uint32_t :2;
71  uint32_t EXT_WU_IEN:4;
72  uint32_t :4;
73  uint32_t EXT_OUT_POL:4;
74  } WU_CNTLbits;
75  };
76  union {
77  uint32_t SLEEP_CNTL;
78  struct CRM_SLEEP_CNTL {
79  uint32_t HIB:1;
80  uint32_t DOZE:1;
81  uint32_t :2;
82  uint32_t RAM_RET:2;
83  uint32_t MCU_RET:1;
84  uint32_t DIG_PAD_EN:1;
85  uint32_t :24;
86  } SLEEP_CNTLbits;
87  };
88  union {
89  uint32_t BS_CNTL;
90  struct CRM_BS_CNTL {
91  uint32_t BS_EN:1;
92  uint32_t WAIT4IRQ:1;
93  uint32_t BS_MAN_EN:1;
94  uint32_t :2;
95  uint32_t ARM_OFF_TIME:6;
96  uint32_t :18;
97  } BS_CNTLbits;
98  };
99  union {
100  uint32_t COP_CNTL;
101  struct CRM_COP_CNTL {
102  uint32_t COP_EN:1;
103  uint32_t COP_OUT:1;
104  uint32_t COP_WP:1;
105  uint32_t :5;
106  uint32_t COP_TIMEOUT:7;
107  uint32_t :1;
108  uint32_t COP_COUNT:7;
109  uint32_t :9;
110  } COP_CNTLbits;
111  };
112  uint32_t COP_SERVICE;
113  union {
114  uint32_t STATUS;
115  struct CRM_STATUS {
116  uint32_t SLEEP_SYNC:1;
117  uint32_t HIB_WU_EVT:1;
118  uint32_t DOZE_WU_EVT:1;
119  uint32_t RTC_WU_EVT:1;
120  uint32_t EXT_WU_EVT:4;
121  uint32_t :1;
122  uint32_t CAL_DONE:1;
123  uint32_t COP_EVT:1;
124  uint32_t :6;
125  uint32_t VREG_BUCK_RDY:1;
126  uint32_t VREG_1P8V_RDY:1;
127  uint32_t VREG_1P5V_RDY:1;
128  uint32_t :12;
129  } STATUSbits;
130  };
131  union {
132  uint32_t MOD_STATUS;
133  struct CRM_MOD_STATUS {
134  uint32_t ARM_EN:1;
135  uint32_t MACA_EN:1;
136  uint32_t ASM_EN:1;
137  uint32_t SPI_EN:1;
138  uint32_t GPIO_EN:1;
139  uint32_t UART1_EN:1;
140  uint32_t UART2_EN:1;
141  uint32_t TMR_EN:1;
142  uint32_t RIF_EN:1;
143  uint32_t I2C_EN:1;
144  uint32_t SSI_EN:1;
145  uint32_t SPIF_EN:1;
146  uint32_t ADC_EN:1;
147  uint32_t :1;
148  uint32_t JTA_EN:1;
149  uint32_t NEX_EN:1;
150  uint32_t :1;
151  uint32_t AIM_EN:1;
152  uint32_t :14;
153  } MOD_STATUSbits;
154  };
155  uint32_t WU_COUNT;
156  uint32_t WU_TIMEOUT;
157  uint32_t RTC_COUNT;
158  uint32_t RTC_TIMEOUT;
159  uint32_t reserved1;
160  union {
161  uint32_t CAL_CNTL;
162  struct CRM_CAL_CNTL {
163  uint32_t CAL_TIMEOUT:16;
164  uint32_t CAL_EN:1;
165  uint32_t CAL_IEN:1;
166  uint32_t :14;
167  } CAL_CNTLbits;
168  };
169  uint32_t CAL_COUNT;
170  union {
171  uint32_t RINGOSC_CNTL;
172  struct CRM_RINGOSC_CNTL {
173  uint32_t ROSC_EN:1;
174  uint32_t :3;
175  uint32_t ROSC_FTUNE:5;
176  uint32_t ROSC_CTUNE:4;
177  uint32_t :19;
178  } RINGOSC_CNTLbits;
179  };
180  union {
181  uint32_t XTAL_CNTL;
182  struct CRM_XTAL_CNTL {
183  uint32_t :8;
184  uint32_t XTAL_IBIAS_SEL:4;
185  uint32_t :4;
186  uint32_t XTAL_FTUNE:5;
187  uint32_t XTAL_CTUNE:5;
188  uint32_t :6;
189  } XTAL_CNTLbits;
190  };
191  union {
192  uint32_t XTAL32_CNTL;
193  struct CRM_XTAL32_CNTL {
194  uint32_t XTAL32_EN:1;
195  uint32_t :3;
196  uint32_t XTAL32_GAIN:2;
197  uint32_t :26;
198  } XTAL32_CNTLbits;
199  };
200  union {
201  uint32_t VREG_CNTL;
202  struct CRM_VREG_CNTL {
203  uint32_t BUCK_EN:1;
204  uint32_t BUCK_SYNC_REC_EN:1;
205  uint32_t BUCK_BYPASS_EN:1;
206  uint32_t VREG_1P5V_EN:2;
207  uint32_t VREG_1P5V_SEL:2;
208  uint32_t VREG_1P8V_EN:1;
209  uint32_t BUCK_CLKDIV:4;
210  uint32_t :20;
211  } VREG_CNTLbits;
212  };
213  uint32_t reserved2;
214  uint32_t SW_RST;
215  uint32_t reserved3;
216  uint32_t reserved4;
217  uint32_t reserved5;
218  uint32_t reserved6;
219 };
220 
221 static volatile struct CRM_struct * const CRM = (void *) (CRM_BASE);
222 
223 /* COP watchdog timer helpers */
224 
225 /* set the cop timout in milliseconds */
226 #define cop_timeout_ms(x) (CRM->COP_CNTLbits.COP_TIMEOUT = x/87)
227 #define cop_service() (CRM->COP_SERVICE = 0xc0de5afe)
228 
229 /* Old register definitions, for compatibility */
230 #ifndef REG_NO_COMPAT
231 
232 static volatile uint32_t * const CRM_SYS_CNTL = ((volatile uint32_t *) (CRM_BASE+0x00));
233 static volatile uint32_t * const CRM_WU_CNTL = ((volatile uint32_t *) (CRM_BASE+0x04));
234 static volatile uint32_t * const CRM_SLEEP_CNTL = ((volatile uint32_t *) (CRM_BASE+0x08));
235 static volatile uint32_t * const CRM_BS_CNTL = ((volatile uint32_t *) (CRM_BASE+0x0c));
236 static volatile uint32_t * const CRM_COP_CNTL = ((volatile uint32_t *) (CRM_BASE+0x10));
237 static volatile uint32_t * const CRM_COP_SERVICE= ((volatile uint32_t *) (CRM_BASE+0x14));
238 static volatile uint32_t * const CRM_STATUS = ((volatile uint32_t *) (CRM_BASE+0x18));
239 static volatile uint32_t * const CRM_MOD_STATUS = ((volatile uint32_t *) (CRM_BASE+0x1c));
240 static volatile uint32_t * const CRM_WU_COUNT = ((volatile uint32_t *) (CRM_BASE+0x20));
241 static volatile uint32_t * const CRM_WU_TIMEOUT = ((volatile uint32_t *) (CRM_BASE+0x24));
242 static volatile uint32_t * const CRM_RTC_COUNT = ((volatile uint32_t *) (CRM_BASE+0x28));
243 static volatile uint32_t * const CRM_RTC_TIMEOUT= ((volatile uint32_t *) (CRM_BASE+0x2c));
244 static volatile uint32_t * const CRM_CAL_CNTL = ((volatile uint32_t *) (CRM_BASE+0x34));
245 static volatile uint32_t * const CRM_CAL_COUNT = ((volatile uint32_t *) (CRM_BASE+0x38));
246 static volatile uint32_t * const CRM_RINGOSC_CNT= ((volatile uint32_t *) (CRM_BASE+0x3c));
247 static volatile uint32_t * const CRM_XTAL_CNTL = ((volatile uint32_t *) (CRM_BASE+0x40));
248 static volatile uint32_t * const CRM_XTAL32_CNTL= ((volatile uint32_t *) (CRM_BASE+0x44));
249 static volatile uint32_t * const CRM_VREG_CNTL = ((volatile uint32_t *) (CRM_BASE+0x48));
250 static volatile uint32_t * const CRM_SW_RST = ((volatile uint32_t *) (CRM_BASE+0x50));
251 
252 /* CRM_SYS_CNTL bit locations */
253 static const int XTAL32_EXISTS = 5;
254 
255 /* CRM_WU_CNTL bit locations */
256 static const int EXT_WU_IEN = 20; /* 4 bits */
257 static const int EXT_WU_EN = 4; /* 4 bits */
258 static const int EXT_WU_EDGE = 8; /* 4 bits */
259 static const int EXT_WU_POL = 12; /* 4 bits */
260 static const int TIMER_WU_EN = 0;
261 static const int RTC_WU_EN = 1;
262 static const int TIMER_WU_IEN = 16;
263 static const int RTC_WU_IEN = 17;
264 
265 /* CRM_STATUS bit locations */
266 static const int EXT_WU_EVT = 4; /* 4 bits, rw1c */
267 static const int RTC_WU_EVT = 3; /* rw1c */
268 
269 /* RINGOSC_CNTL bit locations */
270 static const int ROSC_CTUNE = 9; /* 4 bits */
271 static const int ROSC_FTUNE = 4; /* 4 bits */
272 static const int ROSC_EN = 0;
273 
274 #define ring_osc_on() (CRM->RINGOSC_CNTLbits.ROSC_EN = 1)
275 #define ring_osc_off() (CRM->RINGOSC_CNTLbits.ROSC_EN = 0)
276 
277 #define REF_OSC 24000000UL /* reference osc. frequency */
278 #define NOMINAL_RING_OSC_SEC 2000 /* nominal ring osc. frequency */
279 extern uint32_t cal_rtc_secs; /* calibrated 2khz rtc seconds */
280 
281 /* XTAL32_CNTL bit locations */
282 static const int XTAL32_GAIN = 4; /* 2 bits */
283 static const int XTAL32_EN = 0;
284 
285 #define xtal32_on() (set_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
286 #define xtal32_off() (clear_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
287 #define xtal32_exists() (set_bit(*CRM_SYS_CNTL,XTAL32_EXISTS))
288 
289 /* enable external wake-ups on kbi 4-7 */
290 /* see kbi.h for other kbi specific macros */
291 #define enable_ext_wu(kbi) (set_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
292 #define disable_ext_wu(kbi) (clear_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
293 
294 #define is_ext_wu_evt(kbi) (bit_is_set(*CRM_STATUS,(EXT_WU_EVT+kbi-4)))
295 #define clear_ext_wu_evt(kbi) (set_bit(*CRM_STATUS,(EXT_WU_EVT+kbi-4))) /* r1wc bit */
296 
297 /* enable wake-up timer */
298 #define enable_timer_wu_irq() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
299 #define disable_timer_wu_irq() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
300 
301 #define enable_timer_wu() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
302 #define disable_timer_wu() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
303 
304 /* enable wake-up from RTC compare */
305 #define enable_rtc_wu_irq() (set_bit(*CRM_WU_CNTL,RTC_WU_IEN))
306 #define disable_rtc_wu_irq() (clear_bit(*CRM_WU_CNTL,RTC_WU_IEN))
307 
308 #define enable_rtc_wu() ((set_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
309 #define disable_rtc_wu() ((clear_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
310 
311 #define clear_rtc_wu_evt() (set_bit(*CRM_STATUS,RTC_WU_EVT))
312 #define rtc_wu_evt() (bit_is_set(*CRM_STATUS,RTC_WU_EVT))
313 
314 #define SLEEP_MODE_HIBERNATE bit(0)
315 #define SLEEP_MODE_DOZE bit(1)
316 
317 #define SLEEP_PAD_PWR bit(7)
318 #define SLEEP_RETAIN_MCU bit(6)
319 #define sleep_ram_retain(x) (x<<4) /* 0-3 */
320 #define SLEEP_RAM_8K sleep_ram_retain(0)
321 #define SLEEP_RAM_32K sleep_ram_retain(1)
322 #define SLEEP_RAM_64K sleep_ram_retain(2)
323 #define SLEEP_RAM_96K sleep_ram_retain(3)
324 
325 #define pack_XTAL_CNTL(ctune4pf, ctune, ftune, ibias) \
326  (*CRM_XTAL_CNTL = ((ctune4pf << 25) | (ctune << 21) | ( ftune << 16) | (ibias << 8) | 0x52))
327 
328 #endif /* REG_NO_COMPAT */
329 
330 #endif
Generated on Fri Aug 30 2013 12:34:08 for Contiki 2.5 by   doxygen 1.8.3.1