Contiki 2.5
default_lowlevel.c
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #include <mc1322x.h>
37 #include <stdint.h>
38 
39 void default_vreg_init(void) {
40  volatile uint32_t i;
41  *CRM_SYS_CNTL = 0x00000018; /* set default state */
42  *CRM_VREG_CNTL = 0x00000f04; /* bypass the buck */
43  for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
44 // while((((*(volatile uint32_t *)(0x80003018))>>17) & 1) !=1) { continue; } /* wait for the bypass to take */
45  *CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */
46 }
47 
48 void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
49 
50  /* UART must be disabled to set the baudrate */
51  UART1->CON = 0;
52 
53  UART1->BR = ( inc << 16 ) | mod;
54 
55  /* TX and CTS as outputs */
56  GPIO->PAD_DIR_SET.GPIO_14 = 1;
57  GPIO->PAD_DIR_SET.GPIO_16 = 1;
58 
59  /* RX and RTS as inputs */
60  GPIO->PAD_DIR_RESET.GPIO_15 = 1;
61  GPIO->PAD_DIR_RESET.GPIO_17 = 1;
62 
63  /* see Section 11.5.1.2 Alternate Modes */
64  /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
65  /* From the datasheet: "The peripheral function will control operation of the pad IF */
66  /* THE PERIPHERAL IS ENABLED. */
67 
68 #if UART1_RX_BUFFERSIZE > 32
69  *UART1_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
70  *UART1_URXCON = 30; /* interrupt when fifo is nearly full */
71  u1_rx_head = 0; u1_rx_tail = 0;
72 #elif UART1_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
73  *UART1_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
74  *UART1_UCTS = UART1_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
75  *GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART1 CTS and RTS */
76 #else
77  *UART1_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
78 #endif
79 
80  if(samp == UCON_SAMP_16X)
81  set_bit(*UART1_UCON,UCON_SAMP);
82 
83  /* set GPIO15-14 to UART (UART1 TX and RX)*/
84  GPIO->FUNC_SEL.GPIO_14 = 1;
85  GPIO->FUNC_SEL.GPIO_15 = 1;
86 
87  /* interrupt when there are this number or more bytes free in the TX buffer*/
88  UART1->TXCON = 16;
89  u1_tx_head = 0; u1_tx_tail = 0;
90 
91  /* enable UART1 interrupts in the interrupt controller */
92  enable_irq(UART1);
93 }
94 
95 void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
96 
97  /* UART must be disabled to set the baudrate */
98  UART2->CON = 0;
99 
100  UART2->BR = ( inc << 16 ) | mod;
101 
102  /* TX and CTS as outputs */
103  GPIO->PAD_DIR_SET.GPIO_18 = 1;
104  GPIO->PAD_DIR_SET.GPIO_20 = 1;
105 
106  /* RX and RTS as inputs */
107  GPIO->PAD_DIR_RESET.GPIO_19 = 1;
108  GPIO->PAD_DIR_RESET.GPIO_21 = 1;
109 
110  /* see Section 11.5.1.2 Alternate Modes */
111  /* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
112  /* From the datasheet: "The peripheral function will control operation of the pad IF */
113  /* THE PERIPHERAL IS ENABLED. */
114 
115 #if UART2_RX_BUFFERSIZE > 32
116  *UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
117  *UART2_URXCON = 30; /* interrupt when fifo is nearly full */
118  u2_rx_head = 0; u2_rx_tail = 0;
119 #elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, disable flow control, disable rx interrupt */
120  *UART2_UCON = (1 << 0) | (1 << 1) | (0 << 12) | (1 << 14);
121  *UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
122  *GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
123 #else
124  *UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
125 #endif
126 
127  if(samp == UCON_SAMP_16X)
128  set_bit(*UART2_UCON,UCON_SAMP);
129 
130  /* set GPIO15-14 to UART (UART2 TX and RX)*/
131  GPIO->FUNC_SEL.GPIO_18 = 1;
132  GPIO->FUNC_SEL.GPIO_19 = 1;
133 
134  /* interrupt when there are this number or more bytes free in the TX buffer*/
135  UART2->TXCON = 16;
136  u2_tx_head = 0; u2_tx_tail = 0;
137 
138  /* enable UART2 interrupts in the interrupt controller */
139  enable_irq(UART2);
140 }
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