Contiki 2.5
sleep.c
1 /*
2  * Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
3  * to the MC1322x project (http://mc1322x.devl.org)
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the Institute nor the names of its contributors
15  * may be used to endorse or promote products derived from this software
16  * without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  * This file is part of libmc1322x: see http://mc1322x.devl.org
31  * for details.
32  *
33  *
34  */
35 
36 #include <mc1322x.h>
37 #include <board.h>
38 
39 #include "tests.h"
40 #include "config.h"
41 
42 void main(void) {
43 
44  uart_init(INC,MOD,SAMP);
45 
46  *mem32(0x00401ffc) = 0x01234567;
47  *mem32(0x00407ffc) = 0xdeadbeef;
48  *mem32(0x0040fffc) = 0xface00ff;
49  *mem32(0x00410000) = 0xabcd0123;
50 
51  putstr("sleep test\n\r");
52  putstr("0x00401ffc: ");
53  put_hex32(*mem32(0x00401ffc));
54  putstr("\r\n");
55  putstr("0x00407ffc: ");
56  put_hex32(*mem32(0x00407ffc));
57  putstr("\r\n");
58  putstr("0x0040fffc: ");
59  put_hex32(*mem32(0x0040fffc));
60  putstr("\r\n");
61  putstr("0x00410000: ");
62  put_hex32(*mem32(0x00410000));
63  putstr("\r\n");
64 
65  /* radio must be OFF before sleeping */
66  /* otherwise MCU will not wake up properly */
67  /* this is undocumented behavior */
68 // radio_off();
69 
70 #if USE_32KHZ
71  /* turn on the 32kHz crystal */
72  putstr("enabling 32kHz crystal\n\r");
73  /* you have to hold it's hand with this on */
74  /* once you start the 32xHz crystal it can only be stopped with a reset (hard or soft) */
75  /* first, disable the ring osc */
76  clear_bit(*CRM_RINGOSC_CNTL,0);
77  /* enable the 32kHZ crystal */
78  set_bit(*CRM_XTAL32_CNTL,0);
79 
80  /* set the XTAL32_EXISTS bit */
81  /* the datasheet says to do this after you've check that RTC_COUNT is changing */
82  /* the datasheet is not correct */
83  set_bit(*CRM_SYS_CNTL,5);
84  {
85  static volatile uint32_t old;
86  old = *CRM_RTC_COUNT;
87  putstr("waiting for xtal\n\r");
88  while(*CRM_RTC_COUNT == old) {
89  continue;
90  }
91  /* RTC has started up */
92 
93  set_bit(*CRM_SYS_CNTL,5);
94  putstr("32kHZ xtal started\n\r");
95 
96  }
97 #endif
98 
99 
100  /* go to sleep */
101 
102 // *CRM_WU_CNTL = 0; /* don't wake up */
103  *CRM_WU_CNTL = 0x1; /* enable wakeup from wakeup timer */
104 // *CRM_WU_TIMEOUT = 1875000; /* wake 10 sec later if doze */
105 #if USE_32KHZ
106  *CRM_WU_TIMEOUT = 327680*2;
107 #else
108  *CRM_WU_TIMEOUT = 20000; /* wake 10 sec later if hibernate ring osc */
109 #endif
110 
111  /* hobby board: 2kHz = 11uA; 32kHz = 11uA */
112 // *CRM_SLEEP_CNTL = 1; /* hibernate, RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 2kHz = 2.0uA */
113  /* hobby board: 2kHz = 18uA; 32kHz = 19uA */
114 // *CRM_SLEEP_CNTL = 0x41; /* hibernate, RAM page 0 only, retain state, don't power GPIO */ /* approx. 2kHz = 10.0uA */
115  /* hobby board: 2kHz = 20uA; 32kHz = 21uA */
116 // *CRM_SLEEP_CNTL = 0x51; /* hibernate, RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 2kHz = 11.7uA */
117  /* hobby board: 2kHz = 22uA; 32kHz = 22.5uA */
118 // *CRM_SLEEP_CNTL = 0x61; /* hibernate, RAM page 0,1,2 only, retain state, don't power GPIO */ /* approx. 2kHz = 13.9uA */
119  /* hobby board: 2kHz = 24uA; 32kHz = 25uA */
120  *CRM_SLEEP_CNTL = 0x71; /* hibernate, all RAM pages, retain state, don't power GPIO */ /* approx. 2kHz = 16.1uA */
121 // *CRM_SLEEP_CNTL = 0xf1; /* hibernate, all RAM pages, retain state, power GPIO */ /* consumption depends on GPIO hookup */
122 
123 // *CRM_SLEEP_CNTL = 2; /* doze , RAM page 0 only, don't retain state, don't power GPIO */ /* approx. 69.2 uA */
124 // *CRM_SLEEP_CNTL = 0x42; /* doze , RAM page 0 only, retain state, don't power GPIO */ /* approx. 77.3uA */
125 // *CRM_SLEEP_CNTL = 0x52; /* doze , RAM page 0&1 only, retain state, don't power GPIO */ /* approx. 78.9uA */
126 // *CRM_SLEEP_CNTL = 0x62; /* doze , RAM page 0,1,2 only, retain state, don't power GPIO */ /* approx. 81.2uA */
127 // *CRM_SLEEP_CNTL = 0x72; /* doze , all RAM pages, retain state, don't power GPIO */ /* approx. 83.4uA - possibly with periodic refresh*/
128 // *CRM_SLEEP_CNTL = 0xf2; /* doze , all RAM pages, retain state, power GPIO */ /* consumption depends on GPIO hookup */
129 
130 
131  /* wait for the sleep cycle to complete */
132  while((*CRM_STATUS & 0x1) == 0) { continue; }
133  /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and powers down */
134  *CRM_STATUS = 1;
135 
136  /* asleep */
137 
138  /* wait for the awake cycle to complete */
139  while((*CRM_STATUS & 0x1) == 0) { continue; }
140  /* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and finishes wakeup */
141  *CRM_STATUS = 1;
142 
143  putstr("\n\r\n\r\n\r");
144  putstr("0x00401ffc: ");
145  put_hex32(*mem32(0x00401ffc));
146  putstr("\r\n");
147  putstr("0x00407ffc: ");
148  put_hex32(*mem32(0x00407ffc));
149  putstr("\r\n");
150  putstr("0x0040fffc: ");
151  put_hex32(*mem32(0x0040fffc));
152  putstr("\r\n");
153  putstr("0x00410000: ");
154  put_hex32(*mem32(0x00410000));
155  putstr("\r\n");
156 
157  *GPIO_PAD_DIR0 = LED_RED;
158 #define DELAY 400000
159 
160  volatile uint32_t i;
161  while(1) {
162 
163  *GPIO_DATA0 = LED_RED;
164 
165  for(i=0; i<DELAY; i++) { continue; }
166 
167  *GPIO_DATA0 = 0;
168 
169  for(i=0; i<DELAY; i++) { continue; }
170 
171  };
172 }
173 
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