11 #include PLATFORM_HEADER
13 #include "hal/micro/micro-common.h"
17 #define HAL_STANDALONE
20 #define AUXADC_REG (0xC0u)
23 #define ADC_6MHZ_CLOCK 0
24 #define ADC_1MHZ_CLOCK 1
26 #define ADC_SAMPLE_CLOCKS_32 0
27 #define ADC_SAMPLE_CLOCKS_64 1
28 #define ADC_SAMPLE_CLOCKS_128 2
29 #define ADC_SAMPLE_CLOCKS_256 3
30 #define ADC_SAMPLE_CLOCKS_512 4
31 #define ADC_SAMPLE_CLOCKS_1024 5
32 #define ADC_SAMPLE_CLOCKS_2048 6
33 #define ADC_SAMPLE_CLOCKS_4096 7
35 #define CAL_ADC_CHANNEL_VDD_4 0x00 //VDD_PADS/4
36 #define CAL_ADC_CHANNEL_VREG_2 0x01 //VREG_OUT/2
37 #define CAL_ADC_CHANNEL_TEMP 0x02
38 #define CAL_ADC_CHANNEL_GND 0x03
39 #define CAL_ADC_CHANNEL_VREF 0x04
40 #define CAL_ADC_CHANNEL_I 0x06
41 #define CAL_ADC_CHANNEL_Q 0x07
42 #define CAL_ADC_CHANNEL_ATEST_A 0x09
44 void stCalibrateVref(
void)
49 tokTypeMfgAnalogueTrimBoth biasTrim;
51 halCommonGetMfgToken(&biasTrim, TOKEN_MFG_ANALOG_TRIM_BOTH);
53 if(biasTrim.auxadc == 0xFFFF) {
62 while (SCR_BUSY_REG) ;
64 SCR_ADDR_REG = AUXADC_REG ;
67 SCR_CTRL_REG = SCR_CTRL_SCR_READ_MASK;
71 while (SCR_BUSY_REG) ;
73 temp_value = SCR_READ_REG & ~mask;
74 temp_value |= biasTrim.auxadc & mask;
76 SCR_WRITE_REG = temp_value;
79 SCR_CTRL_REG = SCR_CTRL_SCR_WRITE_MASK;
82 while (SCR_BUSY_REG) ;
88 void calDisableAdc(
void) {
90 CAL_ADC_CONFIG &= ~CAL_ADC_CONFIG_CAL_ADC_EN;
98 StStatus calStartAdcConversion(int8u dummy1,
104 INT_MGMTCFG &= ~INT_MGMTCALADC;
108 CAL_ADC_CONFIG =((CAL_ADC_CONFIG_CAL_ADC_EN) |
109 (channel << CAL_ADC_CONFIG_CAL_ADC_MUX_BIT) |
110 (rate << CAL_ADC_CONFIG_CAL_ADC_RATE_BIT) |
111 (clock << CAL_ADC_CONFIG_CAL_ADC_CLKSEL_BIT) );
115 INT_MGMTFLAG = INT_MGMTCALADC;
121 StStatus calReadAdcBlocking(int8u dummy,
124 while ( ! (INT_MGMTFLAG & INT_MGMTCALADC) );
126 INT_MGMTFLAG = INT_MGMTCALADC;
128 *value = (int16u)CAL_ADC_DATA;
146 tokTypeMfgRegVoltage1V8 vregOutTok;
147 halCommonGetMfgToken(&vregOutTok, TOKEN_MFG_1V8_REG_VOLTAGE);
150 calStartAdcConversion(DUMMY,
153 ADC_SAMPLE_CLOCKS_128,
155 calReadAdcBlocking(DUMMY, &value);
156 Ngnd = (int32u)value;
159 calStartAdcConversion(DUMMY,
161 CAL_ADC_CHANNEL_VREG_2,
162 ADC_SAMPLE_CLOCKS_128,
164 calReadAdcBlocking(DUMMY, &value);
165 Nreg = (int32u)value;
168 calStartAdcConversion(DUMMY,
170 CAL_ADC_CHANNEL_VDD_4,
171 ADC_SAMPLE_CLOCKS_128,
173 calReadAdcBlocking(DUMMY, &value);
174 Nvdd = (int32u)value;
183 if(vregOutTok == 0xFFFF) {
188 return ((((((Nvdd-Ngnd)<<16)/(Nreg-Ngnd))*vregOutTok)*2)>>16);
195 GPIO_DBGCFG |= GPIO_DBGCFGRSVD;
197 GPIO_DBGCFG &= ~GPIO_DBGCFGRSVD;
204 tokTypeMfgRegTrim regTrim;
208 halCommonGetMfgToken(®Trim, TOKEN_MFG_REG_TRIM);
212 trim1V8 = regTrim.regTrim1V8;
213 trim1V2 = regTrim.regTrim1V2;
217 if((trim1V2 == 0xFF) && (trim1V8 == 0xFF)) {
236 VREG_REG = ( (trim1V8<<VREG_VREG_1V8_TRIM_BIT) |
237 (trim1V2<<VREG_VREG_1V2_TRIM_BIT) );
252 int32u beginTime = ReadRegister(MAC_TIMER);
257 if((OSC24M_CTRL&OSC24M_CTRL_OSC24M_SEL)!=OSC24M_CTRL_OSC24M_SEL) {
268 MAC_TIMER_CTRL |= MAC_TIMER_CTRL_MAC_TIMER_EN;
274 while( ((MAC_TIMER-beginTime)&MAC_TIMER_MAC_TIMER_MASK) < us ) {