1 #ifndef __CONTIKI_CONF_H__CDBB4VIH3I__
2 #define __CONTIKI_CONF_H__CDBB4VIH3I__
5 #include <cc2420-interrupt.h>
6 #include <AT91SAM7S64.h>
15 #define CLOCK_CONF_SECOND 100
17 typedef uint16_t
u16_t;
18 typedef uint32_t
u32_t;
20 typedef int16_t s16_t;
21 typedef int32_t
s32_t;
23 typedef unsigned int clock_time_t;
27 #define BV(x) (1<<(x))
31 #define SPI_TXBUF *AT91C_SPI_TDR
33 #define SPI_RXBUF ((unsigned char)*AT91C_SPI_RDR)
35 #define SPI_WAITFOREOTx() while ((*AT91C_SPI_SR & AT91C_SPI_TXEMPTY) == 0)
37 #define SPI_WAITFOREORx() while ((*AT91C_SPI_SR & AT91C_SPI_RDRF) == 0)
41 #define CC2420_CONF_SYMBOL_LOOP_COUNT 800
44 #define FIFO_IS_1 (*AT91C_PIOA_PDSR & AT91C_PIO_PA2)
46 #define FIFOP_IS_1 (*AT91C_PIOA_PDSR & AT91C_PIO_PA30)
47 #define SFD_IS_1 (*AT91C_PIOA_PDSR & AT91C_PIO_PA15)
50 #define SET_RESET_INACTIVE() setreg(CC2420_MAIN, 0xf800);
51 #define SET_RESET_ACTIVE() setreg(CC2420_MAIN, 0x0000);
53 #define SET_VREG_ACTIVE()
54 #define SET_VREG_INACTIVE()
56 #define FIFOP_INT_INIT() cc2420_interrupt_fifop_int_init()
57 #define DISABLE_FIFOP_INT() (*AT91C_AIC_IDCR = (1 << AT91C_ID_IRQ1))
58 #define ENABLE_FIFOP_INT() (*AT91C_AIC_IECR = (1 << AT91C_ID_IRQ1))
60 #define CC2420_DEFAULT_DEV 1
62 #define SPI_ENABLE() \
64 *AT91C_SPI_MR = ((*AT91C_SPI_MR & ~AT91C_SPI_PCS) \
65 | ((~(1<<CC2420_DEFAULT_DEV) & 0x0f) << 16));\
70 #define SPI_DISABLE() (*AT91C_SPI_CR = AT91C_SPI_LASTXFER)
72 #define CLEAR_FIFOP_INT() (*AT91C_AIC_ICCR = (1 << AT91C_ID_IRQ1))
74 #define LOOP_20_SYMBOLS (MCK/28125)
77 #define UIP_CONF_LLH_LEN 0
78 #define UIP_CONF_BROADCAST 1
79 #define UIP_CONF_LOGGING 1
80 #define UIP_CONF_BUFFER_SIZE 116
82 #define UIP_CONF_TCP_FORWARD 1
85 #define USB_EP1_SIZE 64
86 #define USB_EP2_SIZE 64
87 #define USB_EP3_SIZE 64
89 #define USB_RBC_NUM_BLOCKS 16
91 #define REL_SECT_PREFIX ".rel"
93 #define CC_BYTE_ALIGNED __attribute__ ((packed, aligned(1)))