60 #define MSPI_BUS_MANAGER 1
68 #define MSPI_ENABLE (0xC0)
69 #define MSPI_DISABLE (0x06)
70 #define MSPI_CS_DISABLE 0
71 #define MSPI_DUMMY_BYTE 0xFF
75 #define MSPI_CS_PORT PORTA
76 #define MSPI_CS_PORT_DDR DDRA
77 #define MSPI_CS_PIN_0 PORTA5
78 #define MSPI_CS_PIN_1 PORTA6
79 #define MSPI_CS_PIN_2 PORTA7
91 static uint8_t cs_bcd[8] = {
93 (0xFF & (0 << MSPI_CS_PIN_0) & (0 << MSPI_CS_PIN_1) & (0 << MSPI_CS_PIN_2)),
95 (0x00 | (1 << MSPI_CS_PIN_0) | (0 << MSPI_CS_PIN_1) | (0 << MSPI_CS_PIN_2)),
96 (0x00 | (0 << MSPI_CS_PIN_0) | (1 << MSPI_CS_PIN_1) | (0 << MSPI_CS_PIN_2)),
97 (0x00 | (1 << MSPI_CS_PIN_0) | (1 << MSPI_CS_PIN_1) | (0 << MSPI_CS_PIN_2)),
98 (0x00 | (0 << MSPI_CS_PIN_0) | (0 << MSPI_CS_PIN_1) | (1 << MSPI_CS_PIN_2)),
99 (0x00 | (1 << MSPI_CS_PIN_0) | (0 << MSPI_CS_PIN_1) | (1 << MSPI_CS_PIN_2)),
100 (0x00 | (0 << MSPI_CS_PIN_0) | (1 << MSPI_CS_PIN_1) | (1 << MSPI_CS_PIN_2)),
101 (0x00 | (1 << MSPI_CS_PIN_0) | (1 << MSPI_CS_PIN_1) | (1 << MSPI_CS_PIN_2))
116 #define MSPI_MODE_0 (0x00)
124 #define MSPI_MODE_1 (0x02)
132 #define MSPI_MODE_2 (0x01)
140 #define MSPI_MODE_3 (0x03)
150 #define MSPI_BAUD_MAX (0x00)
155 #define MSPI_BAUD_2MBPS (0x01)
160 #define MSPI_BAUD_1MBPS (0x03)
194 static usart_t usart_ports[2] = {
225 void mspi_init(uint8_t cs, uint8_t mode, uint16_t baud);