49 extern void (*accm_int1_cb)(u8_t reg);
50 extern void (*accm_int2_cb)(u8_t reg);
53 static uint16_t int1_mask = 0, int2_mask = 0;
62 enum ADXL345_STATUSTYPES {
73 static enum ADXL345_STATUSTYPES _ADXL345_STATUS = 0x00;
77 static uint8_t adxl345_default_settings[] = {
82 ADXL345_THRESH_TAP_DEFAULT,
87 ADXL345_LATENT_DEFAULT,
88 ADXL345_WINDOW_DEFAULT,
89 ADXL345_THRESH_ACT_DEFAULT,
90 ADXL345_THRESH_INACT_DEFAULT,
91 ADXL345_TIME_INACT_DEFAULT,
92 ADXL345_ACT_INACT_CTL_DEFAULT,
93 ADXL345_THRESH_FF_DEFAULT,
94 ADXL345_TIME_FF_DEFAULT,
95 ADXL345_TAP_AXES_DEFAULT,
99 ADXL345_BW_RATE_DEFAULT,
100 ADXL345_POWER_CTL_DEFAULT,
101 ADXL345_INT_ENABLE_DEFAULT,
102 ADXL345_INT_MAP_DEFAULT,
105 ADXL345_DATA_FORMAT_DEFAULT,
106 ADXL345_FIFO_CTL_DEFAULT
111 PROCESS(accmeter_process,
"Accelerometer process");
120 accm_write_reg(u8_t reg, u8_t val) {
121 u8_t tx_buf[] = {reg, val};
123 i2c_transmitinit(ADXL345_ADDR);
125 PRINTFDEBUG(
"I2C Ready to TX\n");
127 i2c_transmit_n(2, tx_buf);
129 PRINTFDEBUG(
"WRITE_REG 0x%02X @ reg 0x%02X\n", val, reg);
141 accm_write_stream(u8_t len, u8_t *data) {
142 i2c_transmitinit(ADXL345_ADDR);
144 PRINTFDEBUG(
"I2C Ready to TX(stream)\n");
146 i2c_transmit_n(len, data);
148 PRINTFDEBUG(
"WRITE_STR %u B to 0x%02X\n", len, data[0]);
159 accm_read_reg(u8_t reg) {
162 PRINTFDEBUG(
"READ_REG 0x%02X\n", reg);
165 i2c_transmitinit(ADXL345_ADDR);
167 i2c_transmit_n(1, &rtx);
171 i2c_receiveinit(ADXL345_ADDR);
173 i2c_receive_n(1, &retVal);
188 accm_read_stream(u8_t reg, u8_t len, u8_t *whereto) {
190 PRINTFDEBUG(
"READ_STR %u B from 0x%02X\n", len, reg);
193 i2c_transmitinit(ADXL345_ADDR);
195 i2c_transmit_n(1, &rtx);
199 i2c_receiveinit(ADXL345_ADDR);
201 i2c_receive_n(len, whereto);
212 accm_read_axis(
enum ADXL345_AXIS axis){
218 accm_read_stream(ADXL345_DATAX0 + axis, 2, &tmp[0]);
219 rd = (int16_t)(tmp[0] | (tmp[1]<<8));
235 accm_set_grange(u8_t grange){
236 if(grange > ADXL345_RANGE_16G) {
238 PRINTFDEBUG(
"ADXL grange invalid: %u\n", grange);
244 tempreg = (accm_read_reg(ADXL345_DATA_FORMAT) & 0xFC);
246 accm_write_reg(ADXL345_DATA_FORMAT, tempreg);
255 if(!(_ADXL345_STATUS & INITED)){
256 PRINTFDEBUG(
"ADXL345 init\n");
257 _ADXL345_STATUS |= INITED;
264 ADXL345_DIR &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN);
265 ADXL345_SEL &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN);
266 ADXL345_SEL2 &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN);
272 accm_write_stream(15, &adxl345_default_settings[0]);
273 accm_write_stream(5, &adxl345_default_settings[15]);
274 accm_write_reg(ADXL345_DATA_FORMAT, adxl345_default_settings[20]);
275 accm_write_reg(ADXL345_FIFO_CTL, adxl345_default_settings[21]);
281 ADXL345_IES &=~ (ADXL345_INT1_PIN | ADXL345_INT2_PIN);
282 ADXL345_IE |= (ADXL345_INT1_PIN | ADXL345_INT2_PIN);
292 accm_set_irq(uint8_t int1, uint8_t int2){
294 PRINTFDEBUG(
"IRQs set to INT1: 0x%02X IRQ2: 0x%02X\n", int1, int2);
299 accm_write_reg(ADXL345_INT_ENABLE, (int1 | int2));
300 accm_write_reg(ADXL345_INT_MAP, int2);
311 static volatile clock_time_t ints_backoffs[] = {ADXL345_INT_OVERRUN_BACKOFF, ADXL345_INT_WATERMARK_BACKOFF,
312 ADXL345_INT_FREEFALL_BACKOFF, ADXL345_INT_INACTIVITY_BACKOFF,
313 ADXL345_INT_ACTIVITY_BACKOFF, ADXL345_INT_DOUBLETAP_BACKOFF,
314 ADXL345_INT_TAP_BACKOFF, ADXL345_INT_DATAREADY_BACKOFF};
321 backoff_passed(clocktime_t happenedAt,
const clocktime_t backoff){
322 if(timenow-lasttime >= backoff) {
325 return (timenow-lasttime);
338 ireg = accm_read_reg(ADXL345_INT_SOURCE);
342 if(ireg & int1_mask){
343 if(accm_int1_cb !=
NULL){
344 PRINTFDEBUG(
"INT1 cb invoked\n");
347 }
else if(ireg & int2_mask){
348 if(accm_int2_cb !=
NULL){
349 PRINTFDEBUG(
"INT2 cb invoked\n");
374 static struct timer suppressTimer1, suppressTimer2;
376 #ifdef __IAR_SYSTEMS_ICC__
377 #pragma vector=PORT1_VECTOR
380 interrupt (PORT1_VECTOR)
383 ENERGEST_ON(ENERGEST_TYPE_IRQ);
385 if ((ADXL345_IFG & ADXL345_INT1_PIN) && !(ADXL345_IFG & BV(CC2420_FIFOP_PIN))){
388 timer_set(&suppressTimer1, SUPPRESS_TIME_INT1);
389 ADXL345_IFG &= ~ADXL345_INT1_PIN;
393 }
else if ((ADXL345_IFG & ADXL345_INT2_PIN) && !(ADXL345_IFG & BV(CC2420_FIFOP_PIN))){
396 timer_set(&suppressTimer2, SUPPRESS_TIME_INT2);
397 ADXL345_IFG &= ~ADXL345_INT2_PIN;
403 if(cc2420_interrupt()) {
407 ENERGEST_OFF(ENERGEST_TYPE_IRQ);