50 #define LEDS_ON(x) (LEDS_PxOUT &= ~x)
51 #define LEDS_OFF(x) (LEDS_PxOUT |= x)
62 #define L_ON(x) (LEDS_PxOUT &= ~x)
63 #define L_OFF(x) (LEDS_PxOUT |= x)
68 #define P1SEL2_ 0x0041
69 sfrb(P1SEL2, P1SEL2_);
72 #ifdef __IAR_SYSTEMS_ICC__
74 #define P1SEL2_ (0x0041u)
75 DEFC( P1SEL2 , P1SEL2_)
97 void accm_write_reg(u8_t reg, u8_t val);
106 void accm_write_stream(u8_t len, u8_t *data);
113 u8_t accm_read_reg(u8_t reg);
121 void accm_read_stream(u8_t reg, u8_t len, u8_t *whereto);
127 int16_t accm_read_axis(
enum ADXL345_AXIS axis);
138 void accm_set_grange(u8_t grange);
142 void accm_set_irq(uint8_t int1, uint8_t int2);
148 #define ACCM_REGISTER_INT1_CB(ptr) accm_int1_cb = ptr;
149 #define ACCM_REGISTER_INT2_CB(ptr) accm_int2_cb = ptr;
167 #define SUPPRESS_TIME_INT1 CLOCK_SECOND/4
168 #define SUPPRESS_TIME_INT2 CLOCK_SECOND/4
171 #define ADXL345_THRESH_TAP_DEFAULT 0x48 // 4.5g (0x30 == 3.0g) (datasheet: 3g++)
172 #define ADXL345_OFSX_DEFAULT 0x00 // for individual units calibration purposes
173 #define ADXL345_OFSY_DEFAULT 0x00
174 #define ADXL345_OFSZ_DEFAULT 0x00
175 #define ADXL345_DUR_DEFAULT 0x20 // 20 ms (datasheet: 10ms++)
176 #define ADXL345_LATENT_DEFAULT 0x50 // 100 ms (datasheet: 20ms++)
177 #define ADXL345_WINDOW_DEFAULT 0xFF // 320 ms (datasheet: 80ms++)
178 #define ADXL345_THRESH_ACT_DEFAULT 0x15 // 1.3g (62.5 mg/LSB)
179 #define ADXL345_THRESH_INACT_DEFAULT 0x08 // 0.5g (62.5 mg/LSB)
180 #define ADXL345_TIME_INACT_DEFAULT 0x02 // 2 s (1 s/LSB)
181 #define ADXL345_ACT_INACT_CTL_DEFAULT 0xFF // all axis involved, ac-coupled
182 #define ADXL345_THRESH_FF_DEFAULT 0x09 // 563 mg
183 #define ADXL345_TIME_FF_DEFAULT 0x20 // 160 ms
184 #define ADXL345_TAP_AXES_DEFAULT 0x07 // all axis, no suppression
186 #define ADXL345_BW_RATE_DEFAULT (0x00|ADXL345_SRATE_100) // 100 Hz, normal operation
187 #define ADXL345_POWER_CTL_DEFAULT 0x28 // link bit set, no autosleep, start normal measuring
188 #define ADXL345_INT_ENABLE_DEFAULT 0x00 // no interrupts enabled
189 #define ADXL345_INT_MAP_DEFAULT 0x00 // all mapped to int_1
197 #define ADXL345_DATA_FORMAT_DEFAULT (0x00|ADXL345_RANGE_2G) // right-justify, 2g, 10-bit mode, int is active high
198 #define ADXL345_FIFO_CTL_DEFAULT 0x00 // FIFO bypass mode
203 #define ADXL345_ADDR 0x53
206 #define ADXL345_DEVID 0x00 // read only
208 #define ADXL345_THRESH_TAP 0x1D
209 #define ADXL345_OFSX 0x1E
210 #define ADXL345_OFSY 0x1F
211 #define ADXL345_OFSZ 0x20
212 #define ADXL345_DUR 0x21
213 #define ADXL345_LATENT 0x22
214 #define ADXL345_WINDOW 0x23
215 #define ADXL345_THRESH_ACT 0x24
216 #define ADXL345_THRESH_INACT 0x25
217 #define ADXL345_TIME_INACT 0x26
218 #define ADXL345_ACT_INACT_CTL 0x27
219 #define ADXL345_THRESH_FF 0x28
220 #define ADXL345_TIME_FF 0x29
221 #define ADXL345_TAP_AXES 0x2A
222 #define ADXL345_ACT_TAP_STATUS 0x2B // read only
223 #define ADXL345_BW_RATE 0x2C
224 #define ADXL345_POWER_CTL 0x2D
225 #define ADXL345_INT_ENABLE 0x2E
226 #define ADXL345_INT_MAP 0x2F
227 #define ADXL345_INT_SOURCE 0x30 // read only
228 #define ADXL345_DATA_FORMAT 0x31
229 #define ADXL345_DATAX0 0x32 // read only, LSByte X, two's complement
230 #define ADXL345_DATAX1 0x33 // read only, MSByte X
231 #define ADXL345_DATAY0 0x34 // read only, LSByte Y
232 #define ADXL345_DATAY1 0x35 // read only, MSByte X
233 #define ADXL345_DATAZ0 0x36 // read only, LSByte Z
234 #define ADXL345_DATAZ1 0x37 // read only, MSByte X
235 #define ADXL345_FIFO_CTL 0x38
236 #define ADXL345_FIFO_STATUS 0x39 // read only
239 #define ADXL345_INT_DISABLE 0X00 // used for disabling interrupts
240 #define ADXL345_INT_OVERRUN 0X01
241 #define ADXL345_INT_WATERMARK 0X02
242 #define ADXL345_INT_FREEFALL 0X04
243 #define ADXL345_INT_INACTIVITY 0X08
244 #define ADXL345_INT_ACTIVITY 0X10
245 #define ADXL345_INT_DOUBLETAP 0X20
246 #define ADXL345_INT_TAP 0X40
247 #define ADXL345_INT_DATAREADY 0X80
250 #define ADXL345_DIR P1DIR
251 #define ADXL345_PIN P1PIN
252 #define ADXL345_REN P1REN
253 #define ADXL345_SEL P1SEL
254 #define ADXL345_SEL2 P1SEL2
255 #define ADXL345_INT1_PIN (1<<6) // P1.6
256 #define ADXL345_INT2_PIN (1<<7) // P1.7
257 #define ADXL345_IES P1IES
258 #define ADXL345_IE P1IE
259 #define ADXL345_IFG P1IFG
260 #define ADXL345_VECTOR PORT1_VECTOR
263 #define ADXL345_RANGE_2G 0x00
264 #define ADXL345_RANGE_4G 0x01
265 #define ADXL345_RANGE_8G 0x02
266 #define ADXL345_RANGE_16G 0x03
278 #define ADXL345_SRATE_3200 0x0F // XXX NB don't use at all as I2C data rate<= 400kHz (see datasheet)
279 #define ADXL345_SRATE_1600 0x0E // XXX NB don't use at all as I2C data rate<= 400kHz (see datasheet)
280 #define ADXL345_SRATE_800 0x0D // when I2C data rate == 400 kHz
281 #define ADXL345_SRATE_400 0x0C // when I2C data rate == 400 kHz
282 #define ADXL345_SRATE_200 0x0B // when I2C data rate >= 100 kHz
283 #define ADXL345_SRATE_100 0x0A // when I2C data rate >= 100 kHz
284 #define ADXL345_SRATE_50 0x09 // when I2C data rate >= 100 kHz
285 #define ADXL345_SRATE_25 0x08 // when I2C data rate >= 100 kHz
286 #define ADXL345_SRATE_12_5 0x07 // 12.5 Hz, when I2C data rate >= 100 kHz
287 #define ADXL345_SRATE_6_25 0x06 // when I2C data rate >= 100 kHz
288 #define ADXL345_SRATE_3_13 0x05 // when I2C data rate >= 100 kHz
289 #define ADXL345_SRATE_1_56 0x04 // when I2C data rate >= 100 kHz
290 #define ADXL345_SRATE_0_78 0x03 // when I2C data rate >= 100 kHz
291 #define ADXL345_SRATE_0_39 0x02 // when I2C data rate >= 100 kHz
292 #define ADXL345_SRATE_0_20 0x01 // when I2C data rate >= 100 kHz
293 #define ADXL345_SRATE_0_10 0x00 // 0.10 Hz, when I2C data rate >= 100 kHz
296 void (*accm_int1_cb)(u8_t reg);
297 void (*accm_int2_cb)(u8_t reg);
301 process_event_t int1_event, int2_event;
303 #define ACCM_INT1 0x01
304 #define ACCM_INT2 0x02