72 #define HAL_DUMMY_READ (0x00)
74 #define HAL_TRX_CMD_RW (0xC0)
75 #define HAL_TRX_CMD_RR (0x80)
76 #define HAL_TRX_CMD_FW (0x60)
77 #define HAL_TRX_CMD_FR (0x20)
78 #define HAL_TRX_CMD_SW (0x40)
79 #define HAL_TRX_CMD_SR (0x00)
80 #define HAL_TRX_CMD_RADDRM (0x7F)
82 #define HAL_CALCULATED_CRC_OK (0)
96 static uint16_t hal_system_time = 0;
99 static uint8_t
volatile hal_bat_low_flag;
100 static uint8_t
volatile hal_pll_lock_flag;
149 SPCR = (1 << SPE) | (1 << MSTR);
153 TCCR1B = HAL_TCCR1B_CONFIG;
154 TIFR1 |= (1 << ICF1);
155 HAL_ENABLE_OVERFLOW_INTERRUPT();
169 hal_bat_low_flag = 0;
170 hal_pll_lock_flag = 0;
173 rx_start_callback =
NULL;
174 trx_end_callback =
NULL;
189 return hal_bat_low_flag;
199 hal_bat_low_flag = 0;
210 return trx_end_callback;
221 trx_end_callback = trx_end_callback_handle;
232 trx_end_callback =
NULL;
244 return rx_start_callback;
255 rx_start_callback = rx_start_callback_handle;
266 rx_start_callback =
NULL;
280 return hal_pll_lock_flag;
290 hal_pll_lock_flag = 0;
311 uint8_t register_value = 0;
319 while ((SPSR & (1 << SPIF)) == 0) {;}
320 register_value = SPDR;
322 SPDR = register_value;
323 while ((SPSR & (1 << SPIF)) == 0) {;}
324 register_value = SPDR;
330 return register_value;
354 while ((SPSR & (1 << SPIF)) == 0) {;}
355 uint8_t dummy_read = SPDR;
358 while ((SPSR & (1 << SPIF)) == 0) {;}
382 register_value &= mask;
383 register_value >>= position;
385 return register_value;
406 register_value &= ~mask;
412 value |= register_value;
435 if (!rx_frame && !rx_callback)
444 while ((SPSR & (1 << SPIF)) == 0) {;}
445 uint8_t frame_length = SPDR;
449 while ((SPSR & (1 << SPIF)) == 0) {;}
456 rx_data = (rx_frame->
data);
457 rx_frame->
length = frame_length;
459 rx_callback(frame_length);
463 while ((SPSR & (1 << SPIF)) == 0) {;}
466 uint8_t tempData = SPDR;
470 *rx_data++ = tempData;
472 rx_callback(tempData);
475 crc = _crc_ccitt_update(crc, tempData);
477 while ((SPSR & (1 << SPIF)) == 0) {;}
479 }
while (--frame_length > 0);
483 rx_frame->
lqi = SPDR;
502 rx_frame->
crc =
false;
527 while ((SPSR & (1 << SPIF)) == 0) {;}
528 uint8_t dummy_read = SPDR;
531 while ((SPSR & (1 << SPIF)) == 0) {;}
536 SPDR = *write_buffer++;
539 while ((SPSR & (1 << SPIF)) == 0) {;}
542 }
while (length > 0);
567 while ((SPSR & (1 << SPIF)) == 0) {;}
568 uint8_t dummy_read = SPDR;
572 while ((SPSR & (1 << SPIF)) == 0) {;}
579 while ((SPSR & (1 << SPIF)) == 0) {;}
581 }
while (--length > 0);
606 while ((SPSR & (1 << SPIF)) == 0) {;}
607 uint8_t dummy_read = SPDR;
611 while ((SPSR & (1 << SPIF)) == 0) {;}
617 while ((SPSR & (1 << SPIF)) == 0) {;}
619 }
while (--length > 0);
642 uint32_t isr_timestamp = hal_system_time;
643 isr_timestamp <<= 16;
644 isr_timestamp |= TCNT1;
656 isr_timestamp /= HAL_US_PER_SYMBOL;
657 isr_timestamp &= HAL_SYMBOL_MASK;
659 while ((SPSR & (1 << SPIF)) == 0) {;}
660 uint8_t interrupt_source = SPDR;
662 SPDR = interrupt_source;
663 while ((SPSR & (1 << SPIF)) == 0) {;}
664 interrupt_source = SPDR;
670 if(rx_start_callback !=
NULL){
675 while ((SPSR & (1 << SPIF)) == 0) {;}
676 uint8_t frame_length = SPDR;
679 while ((SPSR & (1 << SPIF)) == 0) {;}
684 rx_start_callback(isr_timestamp, frame_length);
687 if(trx_end_callback !=
NULL){
688 trx_end_callback(isr_timestamp);
702 trx_isr_mask &= ~HAL_BAT_LOW_MASK;